Design Space Exploration of Sparse Accelerators for Deep Neural Networks

Novel architectures for deep learning exploit both activation and weight sparsity to improve the performance of DNN inference. However, this speedup usually brings non-negligible overheads which diminish the efficiency of such designs when running dense models. These overheads specifically are exacerbated for low precision accelerators with optimized SRAM size per core. This paper examines the design space trade-offs of such accelerators aiming to achieve competitive performance and efficiency metrics for all four combinations of dense or sparse activation/weight tensors. To do so, we systematically examine overheads of supporting sparsity on top of an optimized dense core. These overheads are modeled based on parameters that indicate how a multiplier can borrow a nonzero operation from the neighboring multipliers or future cycles. As a result of this exploration, we identify a few promising designs that perform better than prior work. Our findings suggest that even a best design targeting dual sparsity yields 20%-30% drop in power efficiency when performing on single sparse models, i.e., those with only sparse weight or sparse activation tensors. We introduce novel techniques to reuse resources of the same core to maintain high performance and efficiency when running single sparsity or dense models. We call this hybrid design Griffin. Griffin is 1.2, 3.0, 3.1, and 1.4X more power efficient than state-of-the-art sparse architectures, for dense, weight-only sparse, activation-only sparse, and dual sparse models, respectively.