Topology optimization (TO) is a popular and powerful computational approach for designing novel structures, materials, and devices. Two computational challenges have limited the applicability of TO to a variety of industrial applications. First, a TO problem often involves a large number of design variables to guarantee sufficient expressive power. Second, many TO problems require a large number of expensive physical model simulations, and those simulations cannot be parallelized. To address these issues, we propose a general scalable deep-learning (DL) based TO framework, referred to as SDL-TO, which utilizes parallel schemes in high performance computing (HPC) to accelerate the TO process for designing additively manufactured (AM) materials. Unlike the existing studies of DL for TO, our framework accelerates TO by learning the iterative history data and simultaneously training on the mapping between the given design and its gradient. The surrogate gradient is learned by utilizing parallel computing on multiple CPUs incorporated with a distributed DL training on multiple GPUs. The learned TO gradient enables a fast online update scheme instead of an expensive update based on the physical simulator or solver. Using a local sampling strategy, we achieve to reduce the intrinsic high dimensionality of the design space and improve the training accuracy and the scalability of the SDL-TO framework. The method is demonstrated by benchmark examples and AM materials design for heat conduction. The proposed SDL-TO framework shows competitive performance compared to the baseline methods but significantly reduces the computational cost by a speed up of around 8.6x over the standard TO implementation.
翻译:地形优化(TO)是设计新结构、材料和装置的流行和强大的计算方法。两种计算挑战限制了对各种工业应用的可应用性。首先,一个问题往往涉及大量设计变量,以保证足够的表达力。第二,许多问题需要大量昂贵的物理模型模拟,这些模拟是不能平行的。为了解决这些问题,我们建议采用一个通用的可缩放深学习(DL)框架,称为SDL-TO,它利用高性能计算(HPC)的平行计划加速设计添加型(AM)材料的进程。与目前对DL进行的研究不同,我们的框架通过学习迭代历史数据并同时进行关于特定设计及其梯度之间绘图的培训而加速。通过对多个GPPU进行分布式的DL培训,可同时对多个CPUP(DL)进行可缩放的DL(DL)深层学习。 所学的梯度使快速在线更新计划得以实现,而不是根据物理模拟或解析器(HPC)加速设计添加材料的过程。我们的框架通过学习反复的准确性标准框架,可以大大降低SDDL标准设计方法。我们通过SDDDL的精确度,通过SDDL标准设计方法的内在的精确度,从而降低SDDDDDDDDDL标准度,从而降低SDL标准设计方法的内在的精确度。