We present a massively parallel, 3D phase-field simulation framework for modeling ferro-electric materials based scalable logic devices. We self-consistently solve the time-dependent Ginzburg Landau (TDGL) equation for ferroelectric polarization, Poisson equation for electric potential, and charge equation for carrier densities in semiconductor regions. The algorithm is implemented using the AMReX software framework, which provides effective scalability on manycore and GPU-based supercomputing architectures. We demonstrate the performance of the algorithm with excellent scaling results on NERSC multicore and GPU systems, with a significant (15x) speedup on the GPU using a node-by-node comparison. We further demonstrate the applicability of the code in simulations of ferroelectric domain-wall induced negative capacitance (NC) effect in Metal-Ferroelectric-Insulator-Metal (MFIM) and Metal-Ferroelectric-Insulator-Semiconductor-Metal (MFISM) devices. The charge (Q) v.s. applied voltage (V) responses for these structures clearly indicates stabilized negative capacitance.
翻译:我们为基于可缩放逻辑装置的铁电材料建模提供了一个大规模平行的、3D阶段场模拟框架。我们自相矛盾地解决了铁电极、电潜能Poisson等方程式和半导体区域载体密度的充电方程式等基于时间的Ginzbur Landau(TDGL)方程式。算法是使用AMREX软件框架实施的,该软件框架为许多核心和基于GPU的超级计算结构提供了有效的可缩放性。我们展示了算法的性能,在NERSC多核心和GPU系统上取得了极佳的缩放效果,在GPU上用一个(15x)显著的节点比加速。我们进一步展示了该代码在模拟电电场-壁-负电-内电-金属(MFIM)和金属-FERFERM-Inmoctor-Simator-Metal(MFIFISM)装置中,这些电压(Q)应用电压(V)稳定性电压结构的反应。