In this paper, we present microring resonator (MRR) based polymorphic E-O circuits and architectures that can be employed for high-speed and energy-efficient non-binary reconfigurable computing. Our polymorphic E-O circuits can be dynamically programmed to implement different logic and arithmetic functions at different times. They can provide compactness and polymorphism to consequently improve operand handling, reduce idle time, and increase amortization of area and static power overheads. When combined with flexible photodetectors with the innate ability to accumulate a high number of optical pulses in situ, our circuits can support energy-efficient processing of data in non-binary formats such as stochastic/unary and high-dimensional reservoir formats. Furthermore, our polymorphic E-O circuits enable configurable E-O computing accelerator architectures for processing binarized and integer quantized convolutional neural networks (CNNs). We compare our designed polymorphic E-O circuits and architectures to several circuits and architectures from prior works in terms of area, latency, and energy consumption.
翻译:本文中,我们介绍了一种基于微环谐振器(MRR)的多态E-O电路和架构,可用于高速和节能的非二进制可重构计算。我们的多态E-O电路可以在不同的时刻动态地编程以执行不同的逻辑和算术功能。它们能够提供紧凑性和多态性,从而改善操作数处理,减少空闲时间,并增加面积和静态功耗开销的摊销。当与具有在位积累大量光脉冲的固有能力的灵活光电探测器相结合时,我们的电路可以支持非二进制格式(如随机/一元和高维储备格式)的数据的节能处理。此外,我们的多态E-O电路实现了可配置的E-O计算加速器架构,可用于处理二值化和整数量化的卷积神经网络(CNN)。我们将我们设计的多态E-O电路和架构与先前某些电路和架构进行了面积、延迟和能耗方面的比较。