DRAM is the dominant main memory technology used in modern computing systems. Computing systems implement a memory controller that interfaces with DRAM via DRAM commands. DRAM executes the given commands using internal components (e.g., access transistors, sense amplifiers) that are orchestrated by DRAM internal timings, which are fixed foreach DRAM command. Unfortunately, the use of fixed internal timings limits the types of operations that DRAM can perform and hinders the implementation of new functionalities and custom mechanisms that improve DRAM reliability, performance and energy. To overcome these limitations, we propose enabling programmable DRAM internal timings for controlling in-DRAM components. To this end, we design CODIC, a new low-cost DRAM substrate that enables fine-grained control over four previously fixed internal DRAM timings that are key to many DRAM operations. We implement CODIC with only minimal changes to the DRAM chip and the DDRx interface. To demonstrate the potential of CODIC, we propose two new CODIC-based security mechanisms that outperform state-of-the-art mechanisms in several ways: (1) a new DRAM Physical Unclonable Function (PUF) that is more robust and has significantly higher throughput than state-of-the-art DRAM PUFs, and (2) the first cold boot attack prevention mechanism that does not introduce any performance or energy overheads at runtime.
翻译:DRAM 是现代计算系统中使用的主要记忆技术。 计算机系统实施存储控制器, 通过 DRAM 命令与 DRAM 连接。 DRAM 使用由 DRAM 内部时间设置的内部组件( 如存取晶体管、感应放大器) 执行指定命令, 内部时间由 DRAM 内部时间设置, 固定的 DRAM 命令使用。 不幸的是, 使用固定的内部时间限制 DRAM 能够执行的操作类型, 并阻碍实施新的功能和定制机制, 提高 DRAM 的可靠性、 性能和能量。 为了克服这些限制, 我们提议启用两个基于 CODIC 的、 能够让 DRAM 内部时间与 DRAM 组件相匹配的内建程序化时间来控制 DRAM 组件。 为此, 我们设计了 CODIC, 新的低成本 DRAM 子机床, 新的DRAM 运行状态机制比新的DRM 高, 运行状态机制要强得多。 ( 1) DARM 运行新的DRM, 运行中, 运行新的DRMRMDRMDRM 运行中, 运行中, 运行中的新运行中 运行中 运行中, 更强的高级的DRUSDRMDRMDRMDRPDRPDRBRDRP 更强, 。