Fast SC decoding overcomes the latency caused by the serial nature of the SC decoding by identifying new nodes in the upper levels of the SC decoding tree and implementing their fast parallel decoders. In this work, we first present a novel sequence repetition node corresponding to a particular class of bit sequences. Most existing special node types are special cases of the proposed sequence repetition node. Then, a fast parallel decoder is proposed for this class of node. To further speed up the decoding process of general nodes outside this class, a threshold-based hard-decision-aided scheme is introduced. The threshold value that guarantees a given error-correction performance in the proposed scheme is derived theoretically. Analysis and hardware implementation results on a polar code of length $1024$ with code rates $1/4$, $1/2$, and $3/4$ show that our proposed algorithm reduces the required clock cycles by up to $8\%$, and leads to a $10\%$ improvement in the maximum operating frequency compared to state-of-the-art decoders without tangibly altering the error-correction performance. In addition, using the proposed threshold-based hard-decision-aided scheme, the decoding latency can be further reduced by $57\%$ at $\mathrm{E_b}/\mathrm{N_0} = 5.0$~dB.
翻译:快速 SC 解码 快速 SC 解码 克服了由 SC 解码 序列性质的序列性质造成的延迟。 通过在 SC 解码树上层确定新的节点, 并实施快速平行解码器, 从而克服了 SC 解码 的序列性能造成的延迟。 在这项工作中, 我们首先提出一个与特定的位次序列序列序列序列序列相对的新顺序重复节点。 大多数现有的特殊节点类型是拟议序列重复节点的特殊案例。 然后, 提议为这一节点类别建立一个快速平行解码器。 为了进一步加快普通节点解码的解码进程, 引入了一个基于门槛的硬决定辅助办法。 保证在拟议方案中出现特定错误校正性表现的阈值是理论上的。 以 1024美元的极代码长度为1024美元, 1/4美元, 1/2美元, 3/4美元 显示我们提议的算法将所需的时钟周期减少8 美元, 并导致与基于 状态解码的解码员相比, 以 10 $ 美元为基点 硬度的解码, 硬度 。 此外, 可以进一步修改 $_ 正在 降低 。