We present novel algorithms for design and design space exploration. The designs discovered by these algorithms are compositions of function types specified in component libraries. Our algorithms reduce the design problem to quantified satisfiability and use advanced solvers to find solutions that represent useful systems. The algorithms we present in this paper are sound and complete and are guaranteed to discover correct designs of optimal size, if they exist. We apply our method to the design of Boolean systems and discover new and more optimal classical digital and quantum circuits for common arithmetic functions such as addition and multiplication. The performance of our algorithms is evaluated through extensive experimentation. We created a benchmark consisting of specifications of scalable synthetic digital circuits and real-world mirochips. We have generated multiple circuits functionally equivalent to the ones in the benchmark. The quantified satisfiability method shows more than four orders of magnitude speed-up, compared to a generate and test method that enumerates all non-isomorphic circuit topologies. Our approach generalizes circuit optimization. It uses arbitrary component libraries and has applications to areas such as digital circuit design, diagnostics, abductive reasoning, test vector generation, and combinatorial optimization.
翻译:我们提出设计和设计空间探索的新算法。这些算法所发现的设计是各组成图书馆中指定的功能类型的构成。我们的算法减少了设计问题,以量化可参数性,并使用先进的求解器找到代表有用系统的解决方案。我们本文中介绍的算法是健全和完整的,如果存在的话,保证能够发现最佳尺寸的正确设计。我们用我们的方法设计布林系统,并发现新的和更优化的经典数字和量子电路,用于通用算术功能,如添加和乘法。我们算法的性能通过广泛的实验加以评估。我们创建了一个基准,由可缩放的合成数字电路和真实世界的 Mirochips的规格构成。我们产生了与基准中的数字电路设计、诊断、绑架推理、试验矢量生成和组合优化等领域等功能的多条线路。量化的可测量方法显示了四级以上的超量速率速率,而生成和测试方法则列出了所有非形态电路段的生成和测试方法。我们的方法一般化电路路段优化。我们的方法使用任意的组件图书馆,并应用了数字电路路路段设计、诊断、制推、传、试生成、矢生成、制生成和组合等领域的应用。