While in the past decade there has been significant progress in open-source synthesis and verification tools and flows, one piece is still missing in the open-source design automation ecosystem: a tool to estimate the power consumption of a design on specific target technologies. We discuss a work-in-progress method to characterize target technologies using generic micro-benchmarks, whose results can be used to establish power models of these target technologies. These models can further be used to predict the power consumption of a design in a given use case scenario (which is currently out of scope). We demonstrate our characterization method on the publicly documented Lattice iCE40 FPGA technology, and discuss two approaches to generating micro-benchmarks which consume power in the target device: simple lookup table (LUT) instantiation, and a more sophisticated instantiation of ring oscillators. We study three approaches to stimulate the implemented micro-benchmarks in hardware: Verilog testbenches, micro-controller testbenches, and pseudo-random linear-feedback-shift-register-(LFSR)-based testing. We measure the power consumption of the stimulated target devices. Our ultimate goal is to automate power measurements for technology characterization; Currently, we manually measure the consumed power at three shunt resistors using an oscilloscope. Preliminary results indicate that we are able to induce variable power consumption in target devices; However, the sensitivity of the power characterization is still too low to build expressive power estimation models.
翻译:在过去10年中,开放源代码的合成和验证工具已取得重大进展,但开放源代码设计自动化生态系统中仍然缺少一个用于估算特定目标技术设计功耗的工具。我们提出了一种正在进行的方法,使用通用微基准测试特性表征目标技术,结果可用于建立这些目标技术的功率模型。这些模型可以进一步用于预测在给定用例场景下设计的功耗(目前不属于范围)。我们在公开记录的Lattice iCE40 FPGA技术上演示我们的表征方法,并讨论消耗目标器件功率的生成微基准测试的两种方法:简单的查找表(LUT)实例化和更复杂的环振荡器实例化。我们研究了三种在硬件中刺激实施微基准测试的方法:Verilog测试平台、微控制器测试平台和基于伪随机线性反馈移位寄存器(LFSR)的测试。我们测量了受刺激的目标器件的功耗。我们的最终目标是自动测量技术特征的功率;目前,我们使用示波器在三个电流采样电阻处手动测量所消耗的功率。初步结果表明,我们能够在目标器件中引入可变的功耗,但功率表征的灵敏度仍然太低,无法构建表达丰富的功耗估计模型。