Processing-in-memory (PIM) architectures allow software to explicitly initiate computation in the memory. This effectively makes PIM operations a new class of memory operations, alongside standard memory operations (e.g., load, store). For software correctness, it is crucial to have ordering rules for a PIM operation with other PIM operations and other memory operations, i.e., a consistency model that takes into account PIM operations is vital. To the best of our knowledge, little attention to PIM operation consistency has been given in existing works. In this paper, we focus on a specific PIM approach, named bulk-bitwise PIM. In bulk-bitwise PIM, large bitwise operations are performed directly and stored in the memory array. We show that previous solutions for the related topic of maintaining coherency of bulk-bitwise PIM have broken the host native consistency model and prevent any guaranteed correctness. As a solution, we propose and evaluate four consistency models for bulk-bitwise PIM, from strict to relaxed. Our designs also preserve coherency between PIM and the host processor. Evaluating the proposed designs' performance with a gem5 simulation, using the YCSB short-range scan benchmark and TPC-H queries, shows that the run time overhead of guaranteeing correctness is at most $6\%$, and in many cases the run time is even improved. The hardware overhead of our design is less than $0.22\%$.
翻译:PIM(PIM) 架构允许软件在记忆中明确启动计算。 这有效地使PIM(PIM)操作与标准的记忆操作(如装货、存储)一道,使PIM操作成为一个新的记忆操作类别。对于软件正确性来说,关键是要与其他PIM(PIM)操作和其他记忆操作一道,为PIM(PIM)操作订定规则,即一个考虑到PIM操作的统一模式至关重要。根据我们的知识,在现有工作中很少注意PIM(PIM)操作的一致性。在本文中,我们侧重于一种特定的PIM(称为散数比比位PIM)操作,与标准的存储操作一道,成为新的存储操作类别。对于软件正确性操作,对于软件正确性来说,以往关于保持大比重PIM操作操作操作与其他PIM(PIM)操作和其他记忆操作的操作的操作规则,即考虑到PIM(PIM)操作的兼容性模式,而考虑到PIM(PIM) 操作的一致性从严格到放松到放松。在本文中,我们的设计也保留了PIM和主机处理器之间的组合。在批量中直接进行并存储大比存储存储存储存储的大型设计(JER5) 模型时,我们的大多数设计(MS) 模拟(IM) 测试(Y-C) 测试(IM) 运行中,运行(MS-BIBERM) 测试(Y-BIBIB) 的多数) 测试) 测试(Y-BIBLIB) 测试(Y-BLIB) 运行的很多次测试(Y-C) 测试(RBIBIBER) 测试(Y-SBER) 。