Repeated off-chip memory accesses to DRAM drive up operating power for data-intensive applications, and SRAM technology scaling and leakage power limits the efficiency of embedded memories. Future on-chip storage will need higher density and energy efficiency, and the actively expanding field of emerging, embeddable non-volatile memory (eNVM) technologies is providing many potential candidates to satisfy this need. Each technology proposal presents distinct trade-offs in terms of density, read, write, and reliability characteristics, and we present a comprehensive framework for navigating and quantifying these design trade-offs alongside realistic system constraints and application-level impacts. This work evaluates eNVM-based storage for a range of application and system contexts including machine learning on the edge, graph analytics, and general purpose cache hierarchy, in addition to describing a freely available (http://nvmexplorer.seas.harvard.edu/) set of tools for application experts, system designers, and device experts to better understand, compare, and quantify the next generation of embedded memory solutions.
翻译:在数据密集应用方面,重复的芯片内存访问DRAM驱动了运行能力,而SRAM技术的扩大和泄漏能力限制了嵌入记忆的效率。未来的芯片储存将需要更高的密度和能源效率,而新兴的、可嵌入的非挥发性内存(ENVM)技术正在积极扩大,为满足这一需求提供了许多潜在的候选人。每一项技术建议都提出了在密度、读、写和可靠性特点方面不同的权衡取舍,我们提出了一个全面框架,用以在现实的系统限制和应用层面影响的同时,对设计取舍进行导航和量化。这项工作评估了基于 NVM 的储存,用于一系列应用和系统环境,包括边缘的机器学习、图解算和一般目的缓存等级,此外还描述了一套可供应用专家、系统设计师和设备专家自由使用的工具(http://nvmexplorer.se.sea.harvard.edu/),以便更好地了解、比较和量化下一代嵌入式内存解决办法。