The proliferation of number of processing elements (PEs) in parallel computer systems, along with the use of more extensive parallelization of algorithms causes the interprocessor communications dominate VLSI chip space. This paper proposes a new architecture to overcome this issue by using simple crosspoint switches to pair PEs instead of a complex interconnection network. Based on the cyclic permutation wiring idea described in \cite{oruc2016self}, this pairing leads to a linear crosspoint array of $n(n-1)/2$ processing elements and as many crosspoints. We demonstrate the versatility of this new parallel architecture by designing fast searching and sorting algorithms for it. In particular, we show that finding a minimum, maximum, and searching a list of $n$ elements can all be performed in $O(1)$ time with elementary logic gates with $O(n)$ fan-in, and in $O(\lg n)$ time with $O(1)$ fan-in. We further show that sorting a list of $n$ elements can also be carried out in $O(1)$ time using elementary logic gates with $O(n)$ fan-in and threshold logic gates. The sorting time increases to $O(\lg n\lg\lg n)$ if only elementary logic gates with $O(1)$ fan-in are used. The algorithm can find the maximum among $n$ elements in $O(1)$ time, and sort $n$ elements in $O(\lg n (\lg\lg n))$ time. In addition, we show how other fundamental queries can be handled within the same order of time complexities.
翻译:在平行计算机系统中,处理元素的数量激增,同时使用更为广泛的平行算法,导致处理器间通信以VLSI芯片空间为主。本文件提出一个新的结构,通过使用简单的交叉点开关来配对PE而不是复杂的互联网络来克服这一问题。根据在\cite{oruc2016self}中描述的循环变换电线概念,这种配对导致一个线性交叉点阵列,由美元(n-1)/2美元处理元素和许多交叉点。我们通过设计快速搜索和排序程序来显示这一新平行结构的多功能性。特别是,我们显示,找到一个最小的交叉点开关来配对PEE,而不是一个复杂的互联网络。根据在\cite{orum\or\cx}中描述的周期性变换电路线线键概念,用美元(lg)n(n)n(1)美元(pleg)时间和n(n)美元(n)元元)列表也可以在一美元内部进行。如果使用基本逻辑端端值的内电路端值(n)显示,使用O的内电路端值的内电路端值,则显示其他的电阶的值的值的值的值的值的值值的值的值值,则只能值将只能值的值中可以显示。