Printed Electronics (PE) exhibits on-demand, extremely low-cost hardware due to its additive manufacturing process, enabling machine learning (ML) applications for domains that feature ultra-low cost, conformity, and non-toxicity requirements that silicon-based systems cannot deliver. Nevertheless, large feature sizes in PE prohibit the realization of complex printed ML circuits. In this work, we present, for the first time, an automated printed-aware software/hardware co-design framework that exploits approximate computing principles to enable ultra-resource constrained printed multilayer perceptrons (MLPs). Our evaluation demonstrates that, compared to the state-of-the-art baseline, our circuits feature on average 6x (5.7x) lower area (power) and less than 1% accuracy loss.
翻译:印刷电子(PE)展览是按需制作的,由于其添加式制造过程,印刷电子(PE)展品是极低成本、符合性和无毒性要求的,而硅基系统无法提供的,印刷电子(PE)展览是极低成本、极低成本、极低成本的硬件,使机器学习(ML)应用成为具有超低成本、符合性和无毒性要求的领域。然而,印刷电子(PE)的大型特征使得无法实现复杂的印刷ML电路。在这项工作中,我们首次提出了一个自动的有印刷意识的软件/硬件共同设计框架,利用接近的计算原则,使受限制的超资源印刷多层感应器(MLPs)能够实现。我们的评估表明,与最先进的基线相比,我们的电路特征平均为6x(5.7x)低面积(电能)和不到1%的精度损失。</s>