碳纳米管互连的3D芯片硅通孔关键技术及可靠性研究

项目名称： 碳纳米管互连的3D芯片硅通孔关键技术及可靠性研究

项目编号： No.51272153

项目类型： 面上项目

立项/批准年度： 2013

项目学科： 一般工业技术

项目作者： 刘建影

作者单位： 上海大学

项目金额： 80万元

中文摘要： 硅通孔（TSV）技术是解决大规模集成电路互连危机最具潜力的方案之一。目前TSV主要通过电镀铜实现，但工艺复杂和可靠性等问题，限制了其在高密度互连中的运用，因此迫切需要发展亚微米级下的互连材料和工艺。本项目在课题组应用碳纳米管（CNT）材料于高密度封装关键技术研究基础上，对CNT在盲孔中的生长机理、CNT互连3D TSV的集成工艺及集成后器件的可靠性进行深入研究。具体内容包括：CNT在盲孔的生长及运用中出现的机理性问题研究（不同工艺参数、催化剂等条件下的CNT结构与形貌、形成差异性的关键因素及控制方法）；CNT簇致密方法、低温间接转移及其3D TSV集成工艺开发；制作多层（3层以上）CNT TSV芯片，对比并分析不同集成工艺对互连通路的电阻及可靠性（热循环、跌落和电迁移等）的影响；通过可靠性试验结果分析，确定失效模式及相应的失效机理，进而完善CNT生长、互连和3D集成工艺。

中文关键词： 碳纳米管；硅通孔；互连；化学气相沉积；可靠性

英文摘要： The silicon through via (TSV) technology is one of the most potential ways to solve the interconnection crisis of the large scale integrated circuits. Currently, the filling of the TSV is achieved by copper plating with high complex process and low reliability, which limit the application of TSV in high density interconnection, so it's urgent to develop new material and process used for the sub-micro interconnection. Based on the key technology research of carbon nanotubes materials used for high-density packaging, the CNT growth mechanism in blind holes, CNT 3D TSV interconnection integrating technology and integrated chips reliability are investigated. The detail content includes: investigating the mechanism problems research of CNT growth in blind via and practical application under different processes, catalysts, key factors and control methods; developing the CNTs densification method, low temperature transfer and 3D integration process; fabricating the multilayer CNT TSV chips (more than 3 layers), and comparing the effect of different integration processes on via interconnection resistance and 3D chips reliability; through reliability results analysis, determining the failure mode and its failure mechanism to improve the CNT growth, filling and 3D integration processes.

英文关键词： Carbon Nanotube；Through Silicon Via；Interconnection；Chemical Vapor Deposition；Reliability