项目名称: 在高维参数空间中集成电路性能分布分析方法研究
项目编号: No.61274032
项目类型: 面上项目
立项/批准年度: 2013
项目学科: 无线电电子学、电信技术
项目作者: 严昌浩
作者单位: 复旦大学
项目金额: 65万元
中文摘要: 工艺偏差导致流片后的实际电路参数偏离设计值,因此仅考虑设计值这一点的性能已不能满足设计者的需求,他们更关心电路参数扰动时电路性能如何褪化、成品率如何分布、以及参数空间中性能指标完整的分布图像。研究电路性能分布,已成为提升成品率的关键问题。本项目以模拟电路鲁棒稳定性和数字电路中SRAM存储器单元失效问题作为切入点,分析高维参数空间中电路性能分布。现有控制论的鲁棒稳定理论无法直接使用,指数爆炸的蒙特卡罗法难以应用于高维,符号仿真法难以应用于高阶电路稳定性分析。本项目提出利用区间计算的约束满足问题求解方法和高效空间切分技术,以参数空间中的"超立方体"切分代替蒙特卡罗法中的"点"采样,分析模拟电路的稳定性、稳定裕度、增益/相位裕度等性能分布;针对存储器单元失效分布分析的特殊困难,提出利用自适应多层次滑动窗口方法快速寻找失效边界并统计失效概率。本项目将为电路性能分布分析提供新思路和方法。
中文关键词: 纳米工艺扰动;可制造性设计;超大规模集成电路;SRAM成品率分析;成品率提升
英文摘要: For process variations, the parameters on chips deviate from their nominal values greatly. Therefore, only to consider circuit performances on the nominal value is not enough. Designers want and need to know the circuit performance degradation regarding the parametric variations, and the yield distribution, and even the whole image of performance distribution in the parametric space. The analysis of circuit performance distributions becomes a key problem for improving the yield. This project is to develop a novel approach to analyze the performance distribution of analogy circuits and failure distribution of SRAM cells. The existing robust stability theorems in the control theory are not suitable to the analysis in the parametric space. The Monte Carlo method faces the famous "dimension curse", thus it is hardly applied for high dimensional problems. The symbolic simulation and sensitivity analysis method cannot be applied for stability analysis of high order circuits. Therefore, we propose the new approach to develop the interval based solver for constraint satisfied problem (CSP) and the efficient subsection method for high dimensional space in this project, for analyzing the performance distributions of stability, stability margin and gain/phase margin of analogy circuits. To overcome the difficulties of anal
英文关键词: nanometer process variation;Design for Manufacturability;VLSI;Yield Analysis of SRAM;Yield Improvement