In this paper, we present GATSPI, a novel GPU accelerated logic gate simulator that enables ultra-fast power estimation for industry sized ASIC designs with millions of gates. GATSPI is written in PyTorch with custom CUDA kernels for ease of coding and maintainability. It achieves simulation kernel speedup of up to 1668X on a single-GPU system and up to 7412X on a multiple-GPU system when compared to a commercial gate-level simulator running on a single CPU core. GATSPI supports a range of simple to complex cell types from an industry standard cell library and SDF conditional delay statements without requiring prior calibration runs and produces industry-standard SAIF files from delay-aware gate-level simulation. Finally, we deploy GATSPI in a glitch-optimization flow, achieving a 1.4% power saving with a 449X speedup in turnaround time compared to a similar flow using a commercial simulator.
翻译:在本文中,我们展示了新型的GPU加速逻辑门模拟器,这是一个新型的GPU加速逻辑模拟器,能够对具有数百万门的工业规模的ASIC设计进行超快功率估计;为便于编码和维护,HSPPI与CUDA定制内核以PyTorrch编写,在单一GPU系统上实现模拟内核加速达1668X,在多式GPU系统上实现模拟内核加速,与在单一CPU核心上运行的商业门级模拟器相比达到7412X;与使用商业门级模拟器进行的商业门级模拟器相比,HSPI支持行业标准细胞库和SDF有条件延迟声明的一系列简单到复杂的细胞类型,而无需事先校准运行,并从延迟-觉醒门级模拟中生成工业标准的SAIF文件;最后,我们将GLitch-Oppim流程中实现1.4%的节能节能,在周转时间内实现4.4%的节能,而使用商业模拟器进行类似的流动。