Deep Neural Network (DNN) inference is emerging as the fundamental bedrock for a multitude of utilities and services. CPUs continue to scale up their raw compute capabilities for DNN inference along with mature high performance libraries to extract optimal performance. While general purpose CPUs offer unique attractive advantages for DNN inference at both datacenter and edge, they have primarily evolved to optimize single thread performance. For highly parallel, throughput-oriented DNN inference, this results in inefficiencies in both power and performance, impacting both raw performance scaling and overall performance/watt. We present Proximu$\$$, where we systematically tackle the root inefficiencies in power and performance scaling for CPU DNN inference. Performance scales efficiently by distributing light-weight tensor compute near all caches in a multi-level cache hierarchy. This maximizes the cumulative utilization of the existing bandwidth resources in the system and minimizes movement of data. Power is drastically reduced through simple ISA extensions that encode the structured, loop-y workload behavior. This enables a bulk offload of pre-decoded work, with loop unrolling in the light-weight near-cache units, effectively bypassing the power-hungry stages of the wide Out-of-Order (OOO) CPU pipeline. Across a number of DNN models, Proximu$\$$ achieves a 2.3x increase in convolution performance/watt with a 2x to 3.94x scaling in raw performance. Similarly, Proximu$\$$ achieves a 1.8x increase in inner-product performance/watt with 2.8x scaling in performance. With no changes to the programming model, no increase in cache capacity or bandwidth and minimal additional hardware, Proximu$\$$ enables unprecedented CPU efficiency gains while achieving similar performance to state-of-the-art Domain Specific Accelerators (DSA) for DNN inference in this AI era.
翻译:深神经网络(DNN) 的推论正在成为多种公用事业和服务的基本基础。 CPU 继续提升 DNN 的原始计算能力, 以及成熟的高性能图书馆的原始计算能力, 以获取最佳性能 。 虽然一般目的 CPU 给 DNN 的推论在数据中心和边缘都提供了独特的吸引优势, 但主要演变为优化单线性能。 对于高度平行的、 以输量为导向的 DNNN 推论, 这导致电力和性能的低效率, 影响原始性能提升和总体性能/湿度。 我们提供了 Prox$, 从而系统地解决了 CPU DNN 的精度和性能提升的原始性能效率。 虽然一般目的 CPU在多级的缓冲结构中分配了轻度的色素, 并且最大限度地利用系统中的现有带宽度资源, 最大限度地减少数据流动。 电力通过简单的 ISA 扩展DA 来帮助结构化的、 循环性的工作量行为。 这样就可以大量减少预译的 美元, ROUD 工作, 在二极级的运行中, 快速的性能 增长的性能中, 增长的性能 递增增 性能中, 实现 。