Sub/Near-threshold static random-access memory (SRAM) design is crucial for addressing the memory bottleneck in energy-constrained applications. However, the high integration density and reliability under process variations demand an accurate estimation of extremely small failure probabilities. To capture such a rare event in memory circuits, the time and storage overhead of conventional Monte Carlo (MC) simulations cannot be tolerated. On the other hand, classic analytical methods predicting failure probabilities from a physical expression become inaccurate in the sub/near-threshold region due to the assumed distribution or the oversimplified drain current model for nanoscale devices. This work first proposes a simple but efficient drain current model to describe the drain-induced barrier lowering effect at low voltages. Based on that, the probability density functions of the interest metrics in SRAM are derived. Two analytical models are then put forward to evaluate SRAM dynamic stabilities including access and write-time failures. The proposed models can be extended easily to different types of SRAM with different read/write assist circuits. The models are validated against MC simulations across different operating voltages and temperatures. The average relative errors at 0.5V VDD are only 8.8% and 10.4% for the access-time and write failure models respectively. The size of required data samples is 43.6X smaller than that of the state-of-the-art method.
翻译:Sub/Nearthsold 静态随机存取内存(SRAM)的设计对于解决受能源限制的应用程序中的内存瓶颈问题至关重要。然而,流程变异下的高度整合密度和可靠性要求精确估计极小的失灵概率。要在记忆回路中捕捉如此罕见的事件,就不能容忍传统的蒙特卡洛(Monte Carlo)模拟(MC)的时间和存储间接费用。另一方面,由于假定分布或过度简化的纳米级设备当前流出模型,预测物理表达物的失灵概率的典型分析方法在子/近距离控件区域变得不准确。这项工作首先提出了一个简单而高效的当前排流模型,以描述低电压下排导致的阻力降低效应。在此基础上,将得出SRAM(MC)常规测试的时间和存储存储器的概率值值值值值值值。拟议模型可以轻松扩展至不同类型,使用不同的读/纹理当前电路。该模型仅针对不同运行的MSM(MAX)平均温度和VDD(V) 平均温度的模型。