Securing deep neural networks (DNNs) is a problem of significant interest since an ML model incorporates high-quality intellectual property, features of data sets painstakingly collated by mechanical turks, and novel methods of training on large cluster computers. Sadly, attacks to extract model parameters are on the rise, and thus designers are being forced to create architectures for securing such models. State-of-the-art proposals in this field take the deterministic memory access patterns of such networks into cognizance (albeit partially), group a set of memory blocks into a tile, and maintain state at the level of tiles (to reduce storage space). For providing integrity guarantees (tamper avoidance), they don't propose any significant optimizations, and still maintain block-level state. We observe that it is possible to exploit the deterministic memory access patterns of DNNs even further, and maintain state information for only the current tile and current layer, which may comprise a large number of tiles. This reduces the storage space, reduces the number of memory accesses, increases performance, and simplifies the design without sacrificing any security guarantees. The key techniques in our proposed accelerator architecture, Seculator, are to encode memory access patterns to create a small HW-based tile version number generator for a given layer, and to store layer-level MACs. We completely eliminate the need for having a MAC cache and a tile version number store (as used in related work). We show that using intelligently-designed mathematical operations, these structures are not required. By reducing such overheads, we show a speedup of 16% over the closest competing work.
翻译:深度神经网络(DNNs)是一个引起极大兴趣的问题,因为ML模型包含高质量的知识产权、由机械拖车认真整理的数据集特征,以及大型集束计算机的新型培训方法。可悲的是,为提取模型参数而发动的袭击正在上升,因此设计师被迫创建确保这些模型的架构。这个领域的最先进的提案将这种网络的确定性内存访问模式(尽管部分地)带一组存储器,将一组存储器块放在一个牌堆中,并维持在瓷砖的状态(以减少存储空间)。为了提供完整性保障(避免设置),它们不建议任何重大优化,仍然保持区级状态。我们发现,有可能进一步利用DNNNS的确定性内存访问模式,并且只为当前和当前层保持状态信息,而这层可能包含大量砖块。这可以减少存储空间,减少存储器访问次数,提高性能,并简化设计,同时又不牺牲任何存储机层结构。我们使用的关键技术展示了这些智能层的创建速度。我们所要用到的智能层,我们所要用到的存储器级的智能结构中,我们需要的智能层中的一个关键技术, 展示一个小的版本。