Recent research has sought to accelerate cryptographic hash functions as they are at the core of modern cryptography. Traditional designs, however, suffer from the von Neumann bottleneck that originates from the separation of processing and memory units. An emerging solution to overcome this bottleneck is processing-in-memory (PIM): performing logic within the same devices responsible for memory to eliminate data-transfer and simultaneously provide massive computational parallelism. In this paper, we seek to vastly accelerate the state-of-the-art SHA-3 cryptographic function using the memristive memory processing unit (mMPU), a general-purpose memristive PIM architecture. To that end, we propose a novel in-memory algorithm for variable rotation, and utilize an efficient mapping of the SHA-3 state vector for memristive crossbar arrays to efficiently exploit PIM parallelism. We demonstrate a massive energy efficiency of 1,422 Gbps/W, improving a state-of-the-art memristive SHA-3 accelerator (SHINE-2) by 4.6x.
翻译:最近的研究试图加速加密散列功能,因为它们是现代加密法的核心;然而,传统设计却受到由于处理和记忆单元分离而形成的冯纽曼瓶颈的影响。克服这一瓶颈的新兴解决办法是模拟处理:在负责记忆的同一装置内执行逻辑,以消除数据传输,同时提供巨大的计算平行。在本文件中,我们寻求利用中间存储处理器(MMPU),即通用的中间结构,大大加速最先进的SHA-3加密功能。为此,我们提出一个新的可变旋转的模拟算法,并使用SHA-3状态的高效图解,用于中间跨条阵列,以便有效利用PIM平行。我们展示了一个巨大的能源效率,即1,422 Gbps/W,用4.6x改进了一种状态的中间 SHINE-3 加速器(SHINE-2)。