Test Generation of SystemC designs by interlaced Greybox Fuzzing and Concolic Execution

Recent success in high-level synthesis ( HLS ) has enabled designing complex hardware with better abstraction and configurability in high-level languages (e.g. SystemC/C++) compared to low-level register-transfer level ( RTL ) languages. Nevertheless, verification and testing HLS designs are challenging and arduous due to their object oriented nature and inherent concurrency. Test engineers aim to generate qualitative test-cases satisfying various code coverage metrics to ensure minimal presence of bugs in a design. Recent works have demonstrated the success of software testing techniques such as greybox fuzzing and concolic execution to obtain better coverage on SystemC designs. However, each of these techniques is time inefficient which obstructs achieving the desired coverage in shorter time-span. We propose a hybrid approach: interleave greybox fuzzing and concolic execution in an systematic manner, thereby reinforcing both the engines by exchanging intermediate test vectors to alleviate the individual inefficiency of the techniques. We evaluate our framework on a wide spectrum of SystemC benchmarks and show that our technique outperforms existing state-of-the-art methods in terms of number of test cases, branch-coverage and runtime.