Genome sequence alignment is the core of many biological applications. The advancement of sequencing technologies produces a tremendous amount of data, making sequence alignment a critical bottleneck in bioinformatics analysis. The existing hardware accelerators for alignment suffer from limited on-chip memory, costly data movement, and poorly optimized alignment algorithms. They cannot afford to concurrently process the massive amount of data generated by sequencing machines. In this paper, we propose a ReRAM-based accelerator, \Designname, using processing in-memory (PIM) for sequence alignment. \Design achieves superior efficiency and performance via software-hardware co-design. First, we propose an adaptive banded parallelism alignment algorithm suitable for PIM architecture. Compared to the original dynamic programming-based alignment, the proposed algorithm significantly reduces the required complexity, data bit width, and memory footprint at the cost of negligible accuracy degradation. Then we propose the efficient PIM architecture that implements the proposed algorithm. The data flow in \Design achieves four-level parallelism and we design an in-situ alignment computation flow in ReRAM, delivering $3.7$-$6.4\times$ efficiency and throughput improvements compared to our previous PIM design, RAPID. The proposed \Design is reconfigurable to serve as a co-processor integrated into existing genome analysis pipeline to boost sequence alignment or edit distance calculation. On short-read alignment, \Design delivers $86.9\times$ and $31.0\times$ throughput improvements over state-of-the-art CPU and GPU libraries, respectively. As compared to ASIC accelerators for long-read alignment, the performance of \Design is $1.3$-$2.0\times$ higher.
翻译:基因组序列对齐是许多生物应用的核心。 排序技术的进步产生大量数据, 使序列对齐成为生物信息学分析中一个关键的瓶颈。 现有的匹配硬件加速器因芯片内存有限、数据移动费用昂贵和优化调整算法不完善而受到影响。 它们无法同时处理序列机生成的大量数据。 在本文中, 我们提议一个基于 ReRAM 的加速器,\ Dedesignname, 用于序列对齐。\ Dedesignal 的配置通过软件硬件联合设计实现更高的效率和性能。 首先, 我们提议一个适合 PIM 架构的适应性带平行调整算法。 与最初的动态编程匹配算法相比, 大大降低了所需的复杂性、 数据点宽度和记忆足迹, 代价微不足道的精度降解。 然后, 我们提议一个高效的 PIM 结构结构, 交付四级的同步, 并设计一个短期对价比值的比值调整, 用于 RARM 的 RISDRB 的计算流程。 提供 3 7 和 RARB 的升级 。 。 通过 RIS 的当前 的当前 运行 的运行 的运行, 向前的升级 的 和 的 运行 的 运行 的 。