Battery-less technology evolved to replace battery technology. Non-volatile memory (NVM) based processors were explored to store the program state during a power failure. The energy stored in a capacitor is used for a backup during a power failure. Since the size of a capacitor is fixed and limited, the available energy in a capacitor is also limited and fixed. Thus, the capacitor energy is insufficient to store the entire program state during frequent power failures. This paper proposes an architecture that assures safe backup of volatile contents during a power failure under energy constraints. Using a proposed dirty block table (DBT) and writeback queue (WBQ), this work limits the number of dirty blocks in the L1 cache at any given time. We further conducted a set of experiments by varying the parameter sizes to help the user make appropriate design decisions concerning their energy requirements. The proposed architecture decreases energy consumption by 17.56%, the number of writes to NVM by 18.97% at LLC, and 10.66% at a main-memory level compared to baseline architecture.
翻译:无电池技术是替换电池技术的一种方法。非易失性存储器(NVM)基于处理器被开发来在电力失效时存储程序状态。电容器中储存的能量被用作在电力失效时的备份。由于电容器的大小是确定的和有限的,因此电容器中可用的能量也是有限的和固定的。因此,在频繁的电力失效期间,电容器能量不足以存储整个程序状态。本文提出了一种在能量限制下确保在电力失效期间对挥发性内容的安全备份的架构。借助于提出的脏块表(Dirty Block Table,DBT)和写回队列(Writeback Queue,WBQ),本文将L1缓存中脏块的数量限制在任何给定时间内。我们进一步通过改变参数大小进行了一系列实验,以帮助用户做出关于其能量需求的适当设计决策。与基线架构相比,所提出的架构将能量消耗减少了17.56%,LLC和主存储器的NVM写入次数分别减少了18.97%和10.66%。