LDMOS-SCR高压ESD防护器件设计及其闩锁特性估算模型研究

项目名称： LDMOS-SCR高压ESD防护器件设计及其闩锁特性估算模型研究

项目编号： No.61504049

项目类型： 青年科学基金项目

立项/批准年度： 2016

项目学科： 无线电电子学、电信技术

项目作者： 梁海莲

作者单位： 江南大学

项目金额： 18万元

中文摘要： 工作电压在10～60 V之间的功率集成电路（PIC）被广泛用于便携式智能化消费电子产品。但是，静电放电（ESD）对PIC造成的危害已到了严重威胁系统可靠性的程度。本项目针对PIC高压ESD防护器件易闩锁和ESD鲁棒性弱的问题，基于不同高压制备工艺，利用ESD特性测试及TCAD仿真，围绕LDMOS-SCR高压ESD防护器件开展如下研究：1）设计新型结构与版图形状，降低器件电子发射率和寄生NPN或PNP的正反馈程度，提高维持电压；引入二次或多次触发机制，提高维持电流，增强器件抗闩锁能力和ESD鲁棒性；2）分别研究器件结构和工艺特征对器件闩锁特性的影响，采用新颖雪崩工作区收敛算法，建立室温闩锁特性估算模型；3）研究器件在变温ESD应力作用下的新工作机理，结合电荷陷阱新机制，建立变温闩锁特性估算模型。通过本项目的实施，可提高PIC的系统可靠性，获得抗闩锁强ESD鲁棒性的高压ESD防护设计核心技术。

中文关键词： 高压ESD防护；横向扩散金属氧化物半导体；闩锁特性；估算模型；可控硅

英文摘要： Power integrated circuits (PICs) with the operation voltage between 10 to 60 V have been widely used in the portable and smart consumer electronics. However, damages caused by electrostatic discharge (ESD) to PICs are also becoming a severe threat to the reliability of these electronic systems. Aiming at the easy latch-up and weak ESD robustness problems in the high voltage ESD protection devices for PICs, based on different high voltage processes, ESD characteristics measurements and the technology computer aided design (TCAD) simulations, we will conduct the following research content about the lateral diffused metal oxide semiconductor embedded in silicon controlled rectifier (LDMOS-SCR) devices: 1) designing novel structure and layout of LDMOS-SCR to improve the holding voltage by reducing the electron emission efficiency and the positive feedback level formed by parasitic NPN and PNP transistors; and introducing suitable two and multiple times trigger mechanisms to improve the holding current, and finally obtaining latch-up immune LDMOS-SCR device with strong ESD robustness; 2) investigating the effects of device structure and fabrication process features on the latch-up characteristics, and establishing a room-temperature latch-up characteristics estimation model by using the novel avalanche operation area convergence algorithm; 3) exploring the novel working mechanism of LDMOS-SCR device under variable temperature and different ESD stress, and obtaining a variable temperature latch-up characteristics estimation model by combining the charge trapping mechanism. The research results of this project can help to improve the systems reliability of PICs by adopting the core technologies of latch-up immune high voltage ESD protection design with strong ESD robustness.

英文关键词： high voltage ESD protection;lateral diffused metal oxide semiconductor;latch-up characteristics;estimation model;silicon controlled rectiifier