Conventional neural structures tend to communicate through analog quantities such as currents or voltages, however, as CMOS devices shrink and supply voltages decrease, the dynamic range of voltage/current-domain analog circuits becomes narrower, the available margin becomes smaller, and noise immunity decreases. More than that, the use of operational amplifiers (op-amps) and continuous-time or clocked comparators in conventional designs leads to high energy consumption and large chip area, which would be detrimental to building spiking neural networks. In view of this, we propose a neural structure for generating and transmitting time-domain signals, including a neuron module, a synapse module, and two weight modules. The proposed neural structure is driven by a leakage current of MOS transistors and uses an inverter-based comparator to realize a firing function, thus providing higher energy and area efficiency compared to conventional designs. The proposed neural structure is fabricated using TSMC 65 nm CMOS technology. The proposed neuron and synapse occupy the area of 127 {\mu}m^{ 2} and 231 {\mu}m^{ 2}, respectively, while achieving millisecond time constants. Actual chip measurements show that the proposed structure implements the temporal signal communication function with millisecond time constants, which is a critical step toward hardware reservoir computing for human-computer interaction. Simulation results of the spiking-neural network for reservoir computing with the behavioral model of the proposed neural structure demonstrate the learning function.
翻译:常规神经结构往往通过电流或电压等类似数量进行交流,然而,随着CMOS设备缩小和供应电压的减少,电压/电流/电流模拟电路的动态范围缩小,现有空间变小,噪音免疫力下降,超过此,在常规设计中使用操作放大器(OP-amps)和连续时间或时钟参照器,导致高能量消耗和大芯片面积,不利于建设喷射神经网络。为此,我们提议建立一个神经结构,用于生成和传输时空信号,包括神经结构、神经神经系统模块和两个重量模块。拟议的神经结构由MOS晶体管的渗漏流驱动,并使用以垂直参照器为基础的比较器来实现射击功能,从而提供更高的能源和地区效率,而与常规设计相比,拟议的神经结构是使用TESMC 65 nM CMOS 技术制造的。拟议的神经和神经神经神经系统结构,覆盖着127 模模模内神经系统信号,包括神经结构模块模块模块、神经神经系统模块模块模块模块和两个重量模块模块模块。 人类电流运行运行运行运行运行中的拟议固定运行运行。