Probabilistic shaping (PS) has been widely studied and applied to optical fiber communications. The encoder of PS expends the number of bit slots and controls the probability distribution of channel input symbols. Not only studies focused on PS but also most works on optical fiber communications have assumed source uniformity (i.e. equal probability of marks and spaces) so far. On the other hand, the source information is in general nonuniform, unless bit-scrambling or other source coding techniques to balance the bit probability is performed. Interestingly, one can exploit the source nonuniformity to reduce the entropy of the channel input symbols with the PS encoder, which leads to smaller required signal-to-noise ratio at a given input logic rate. This benefit is equivalent to a combination of data compression and PS, and thus we call this technique compressed shaping. In this work, we explain its theoretical background in detail, and verify the concept by both numerical simulation and a field programmable gate array (FPGA) implementation of such a system. In particular, we find that compressed shaping can reduce power consumption in forward error correction decoding by up to 90% in nonuniform source cases. The additional hardware resources required for compressed shaping are not significant compared with forward error correction coding, and an error insertion test is successfully demonstrated with the FPGA.
翻译:概率成像( PS) 已被广泛研究并应用于光纤通信 。 PS 的编码器花费了位位槽数并控制了频道输入符号的概率分布。 不仅以 PS 为重点研究, 而且大部分光纤通信工作都假定了源的统一性( 与标记和空格的概率相等 ) 。 另一方面, 源信息一般而言不统一, 除非执行比特拼动或其他源编码技术以平衡比特概率。 有趣的是, 人们可以利用源的不统一性来减少频道输入符号与 PS 编码器的宽度, 以给定输入逻辑速率降低所需的信号对噪音比。 这个好处相当于数据压缩和 PS 的组合, 因此我们称之为这种技术压缩形状。 在这项工作中, 我们详细解释其理论背景, 并通过数字模拟和外地可编程门阵列( FPGA) 来核查这个概念。 特别是, 我们发现, 压缩FPE的节制能消耗量减少与前方错误的消耗量, 以给特定输入的输入的硬体校正模式, 是要测试的硬件校正 。 。 测试中, 以90 测试的硬件校正法 需要 。