For a distributed last level cache (LLC) in a large multicore chip, the access time to one LLC bank can significantly differ from that to another. The disparity in access time is due to the different physical distances to the target LLC slices. In this paper, we demonstrate the possibility of exploiting such a distance-based side channel, by timing a vulnerable version of AES decryption and extracting part of the secret keys. We introduce several techniques to overcome the challenges of the attack, including using multiple attack threads to ensure LLC hits of the vulnerable memory locations and to time part of the decryption function. We further propose CAMOUFLAGE , an efficient, architectural defense for the proposed distance-based side-channel attack. At runtime, when a potentially leaking memory instruction is executed by a victim function, CAMOUFLAGE uses a combination of jitter and bypass mechanisms to eliminate any LLC hit time difference due to the distance and thereby, prevent the attack. We evaluate two versions of CAMOUFLAGE - CAMOUFLAGE JITTER and CAMOUFLAGE BYPASS using the Gem5 simulator with PARSEC and Rodinia benchmarks and show that they incur performance overheads of 14.14% or none over the baseline.
翻译:对于在大型多极芯片中分布的最后一级缓存(LLC)而言,一个LLC银行的存取时间可能与另一家不同。准入时间的差别是由于距离目标的LLC切片的物理距离不同。在本文中,我们展示了利用这种远程侧通道的可能性,方法是为AES解密和提取部分秘密密钥的脆弱版本定时。我们采用几种技术来克服攻击的挑战,包括使用多条攻击线确保LLC击中脆弱的记忆位置和解密功能的部分时间。我们进一步提议CAMFLAGE为拟议的远程侧通道攻击提供高效的建筑防御。在运行时,当受害者功能执行可能泄漏的记忆指示时,CAMOULAGE使用一种杂音和绕行机制组合来消除LC因距离而造成的任何时间差,从而防止攻击。我们用两个版本评价了CAMOFLA - CAMFLA JITTER 和CAUFLAGE BY BY, 我们评估了两个版本的版本,我们用14个基基模标准或基模LADIS 展示了运行基准和14个基底级标准。