数字声呐接收机调理电路单芯片设计与噪声优化方法研究

项目名称： 数字声呐接收机调理电路单芯片设计与噪声优化方法研究

项目编号： No.61274025

项目类型： 面上项目

立项/批准年度： 2013

项目学科： 无线电电子学、电信技术

项目作者： 刘岩

作者单位： 中国科学院声学研究所

项目金额： 80万元

中文摘要： 课题以改进数字声呐接收机庞大而又复杂的调理电路为切入点，提出了一种声呐接收机调理电路单芯片集成实现的技术解决方案，并根据该解决方案，设计实现一款将自动增益控制器、前置带通滤波器、Sigma Delta模数转换器、数字IQ正交混频器等集成在一起的数字声呐调理电路专用芯片。芯片改进了自动增益控制器的衰减量，在相同位宽时实现了更大范围的增益控制；提出了满足要求的片外可配置的带通滤波器设计方案；提出了一种新型的连续/离散混合调制器结构的电容数字自校准Sigma Delta模数转换器，消除了对驱动放大器的额外要求，同时没有了开关电容耦合到系统中的噪声，改善了系统的整体性能，降低了功耗；内部集成了数控振荡器和数字IQ正交混频器，比模拟混频器具有更好的精度、更好的抗干扰性能。专用芯片减小了每路模拟通道信号处理电路的体积，提升了系统的阵列信号处理能力，实现芯片的自主研发制造,解决芯片的断货和禁运之忧。

中文关键词： 声纳接收机；信号调理；模数转换器；动态范围；

英文摘要： In order to improve the huge and complex conditioning circuit of digital sonar receiver, the research puts forward a single-chip integrated technical solution and according to the solution, we design a special chip for digital sonar receiver that is integrated with automatic gain controller (AGC), pre-band-pass filter, Sigma Delta ADC, digital IQ mixers, etc. The solution improves the attenuation of AGC, realizes a wider scope gain control with the same bit-wide, and proposes a design of off-chip configured band-pass filter that meets the requirements. It provides a new mixed continuous-time/discrete-time, single-loop, fourth-order, 4-bit sigma delta ADC with capacitor digital self-calibration for RC spread compensation. This ADC combines the benefits of CT and DT circuits, removes extra need for driver amplifier, and, in the meantime, eliminates the noise coupling into the system by switch capacitive, enhances the overall system performance, reduces power consumption. The solution integrates digital controlled oscillator and digital IQ mixer. Compared with analog mixer, it has better accuracy and anti-interference performance. The special chip reduces the size of each analog signal channel, enhances system performance in processing array signals, achieves independent research and development of chips and remove

英文关键词： Sonar receiver；Signal condition；ADC；Dynamic range；