多核系统中基于新型存储器工艺的高能效缓存设计研究

项目名称： 多核系统中基于新型存储器工艺的高能效缓存设计研究

项目编号： No.61202072

项目类型： 青年科学基金项目

立项/批准年度： 2013

项目学科： 计算机科学学科

项目作者： 孙广宇

作者单位： 北京大学

项目金额： 25万元

中文摘要： 新型存储器工艺（如MRAM和PCM等）作为SRAM的替代工艺受到越来越多的关注和研究。这些存储工艺具单位面积存储密度高，静态功耗低等优点。在多核系统的缓存体系中使用这些存储工艺，有助于提高系统性能并降低功耗。然而，对基于新型工艺缓存的访问操作在性能和功耗等方面存在"非对称性"，并且在工艺扰动的影响下显得更加突出。这一特性已成为采用这些新存储工艺的一个主要障碍。本课题研究如何在多核系统中，利用这些新型存储工艺设计高能效的缓存。主要研究内容包括：（1）考虑工艺扰动的影响对新型存储工艺在器件和电路级建模；（2）基于模型开发能够根据不同系统规格要求优化缓存电路设计的仿真器（3）针对新型工艺缓存的非对称性提出结构改进和管理策略的优化。通过以上研究，本项目可以帮助缓存设计者根据多核系统的设计规格快速的选择合适的存储工艺和设计参数，同时利用结构级优化技术进一步提高缓存的性能并降低功耗。

中文关键词： 新型存储器工艺；缓存体系；非对称访问；多核系统；高能效

英文摘要： As potential replacements of the traditional SRAM technology, various emerging memory technologies, such as MRAM and PCM, have been attracting more and more attention and been extensively researched. These memory technologies have common advantages of high density, low static power consumption, etc. Prior research has shown that the cache hierarchy based on these memory technologies can help improve performance and reduce power consumption of a multi-core system. The caches based on these emerging memory technologies, however, have a common issue of "asymmetric-access", in respect of performance, power, and reliability. Moreover, it becomes more significant under the effect of process variations. This issue has become the main obstacle of adopting these technologies in the future cache hierarchy. This proposal will explore the energy-efficient cache hierarchy design using these emerging memory technologies in multi-core systems. The proposal includes following research topics: (1) building cell level and circuit level models of these emerging memory technologies with the consideration of process variations; (2) based on these models, developing a circuit level simulator, which can optimize cache designs for different system design specifications; (3) proposing novel asymmetric-access-aware techniques to improve

英文关键词： emerging memory technologies；cache hierarchy；asymmetric access；multi-core system；energy efficient