Reconfigurable intelligent surfaces (RISs) are anticipated to transform wireless communication in a way that is both economical and energy efficient. Revealing the practical power consumption characteristics of RISs can provide an essential toolkit for the optimal design of RIS-assisted wireless communication systems and energy efficiency performance evaluation. Based on our previous work that modeled the dynamic power consumption of RISs, we henceforth concentrate more on static power consumption. We first divide the RIS hardware into three basic parts: the FPGA control board, the drive circuits, and the RIS unit cells. The first two parts are mainly to be investigated and the last part has been modeled as the dynamic power consumption in the previous work. In this work, the power consumption of the FPGA control board is regarded as a constant value, however, that of the drive circuit is a variant that is affected by the number of control signals and its self-power consumption characteristics. Therefore, we model the power consumption of the drive circuits of various kinds of RISs, i.e., PIN diode-/Varactor diode-/RF switch-based RIS. Finally, the measurement results and typical value of static power consumption are illustrated and discussed.
翻译:重新配置的智能表面(RIS)预计将以节约和节能的方式改造无线通信; 释放RIS的实际电耗特点可以为最佳设计RIS辅助无线通信系统和能源效率绩效评估提供一个基本工具包。 根据我们以前模拟RIS动态电耗的工作,我们今后将更多集中于静态电耗。 我们首先将RIS硬件分为三个基本部分:FPGA控制板、驱动电路和RIS单元细胞。前两个部分主要要调查,最后部分是前一项工作的动态电耗模型。在这项工作中,FPGA控制板的电耗被视为一个不变价值,然而,驱动电路是一种受控制信号数量及其自能耗特征影响的变体。因此,我们将各种RIS的驱动电路的电流的电量消耗量进行模型,即PINdiode/Varactor Diode/RF开关的电流耗量模型。 最后,对PGGGA的测量结果和典型值进行了演示。</s>