L2C2: Last-Level Compressed-Cache NVM and a Procedure to Forecast Performance and Lifetime

Several emerging non-volatile memory (NVM) technologies are rising as interesting alternatives to build the Last-Level Cache (LLC). Their advantages, compared to SRAM memory, are higher density and lower static power, but each write operation slightly wears out the bitcell, to the point of losing its storage capacity. In this context, this paper proposes a new LLC organization designed to extend the lifetime of the NVM data array and a methodological proposal to forecast in detail the capacity and performance of NVM caches over its lifetime. Data compression is one of the techniques dealing with the degradation of a NV-LLC, as it decreases the write bandwidth delivered to the cache. The proposed NV-LLC organization takes advantage of compression, but with a relevant contribution: as capacity is reduced by write wear, degraded cache frames can allocate blocks whose compressed size is adequate. From a methodological point of view, although different approaches are used in the literature to analyze the degradation of a NV-LLC, none of them allows to study in detail its temporal evolution. In this sense, this work proposes a forecast procedure that combines detailed simulation and prediction, allowing an accurate analysis of the impact of different cache control policies and mechanisms (replacement, wear leveling, compression, etc.) on the temporal evolution of the indices of interest, such as the effective capacity of the NV-LLC or the system IPC. The proposed NV-LLC organization has a small added cost compared to that of a baseline NV-LLC without compression in terms of area, latency and energy consumption, and increases up to 6-36 times the time required to reach 50% effective capacity in an STT-RAM-based NV-LLC.