Architectural simulators help in better understanding the behaviour of existing architectures and the design of new architectures. Virtualization has regained importance and this has put a pressing demand for the simulation of virtualized systems. Existing full-system simulators for virtualized systems simulate the application program instructions and the operating system instructions but abstract the hypercalls or traps to the hypervisor. This leads to inaccuracy in the simulation. This paper proposes an approach to simulate hypervisor instructions in addition to operating system instructions for accurate timing simulation of virtualized systems. The proposed approach is demonstrated by simulating RISC-V binary instructions. The simulator is an execution-driven, functional-first, hardware-based simulator coded in Verilog. The paper concludes that the proposed approach leads to accurate timing simulation of virtualized systems.
翻译:建筑模拟器有助于更好地了解现有建筑结构的行为和新建筑的设计。 虚拟化已重新获得重要性,这给模拟虚拟化系统带来了迫切的需求。 虚拟化系统的现有全系统模拟器模拟了应用程序指示和操作系统指示,但将超声波或陷阱抽象到超光镜上。 这导致模拟中的不准确性。 本文提出一种模拟超光谱指示的方法,除了操作系统指示之外,还模拟超光谱指示,用于模拟虚拟化系统的准确时间模拟。 模拟RISC- V 二进制指示显示了拟议方法。 模拟器是一个执行驱动的、 功能第一、 硬件模拟器在Verilog 编码的模拟器。 本文的结论是,拟议方法导致虚拟化系统的准确时间模拟。