Analog to Digital Converters (ADCs) are a major contributor to the energy consumption on the receiver side of millimeter-wave multiple-input multiple-output (MIMO) systems with large antenna arrays. Consequently, there has been significant interest in using low-resolution ADCs along with hybrid beam-forming at MIMO receivers for energy efficiency. However, decreasing the ADC resolution results in performance loss -- in terms of achievable rates -- due to increased quantization error. In this work, we study the application of practically implementable nonlinear analog operations, prior to sampling and quantization at the ADCs, as a way to mitigate the aforementioned rate-loss. A receiver architecture consisting of linear analog combiners, implementable nonlinear analog operators, and one-bit threshold ADCs is designed. The fundamental information theoretic performance limits of the resulting communication system, in terms of achievable rates, are investigated under various assumptions on the set of implementable nonlinear analog functions. In order to justify the feasibility of the nonlinear operations in the proposed receiver architecture, an analog circuit is introduced, and circuit simulations exhibiting the generation of the desired nonlinear analog operations are provided.
翻译:数字转换器分析器(ADCs)是使用大型天线阵列的毫米波多投多输出量(MIMO)系统接收器的能量消耗的主要成因,因此,在MIMO接收器使用低分辨率ADC以及混合波束成形来提高能效方面,人们非常有兴趣使用低分辨率ADCs以及MIMO接收器的混合波束成型,然而,ADC分辨率的减少导致因四分制错误增加而导致的性能损失 -- -- 从可实现的速率来看 -- -- 。在这项工作中,我们研究在ADCs取样和定量之前实际应用非线性非线性模拟操作,以缓解上述损失率。由线性模拟合并器、可执行的非线性模拟操作器和一位阈值ADC组成的接收器结构,根据关于可执行的非线性模拟功能系列的各种假设,对由此形成的通信系统的基本性能定律性能限度进行了调查。为了证明拟议接收器结构的非线性操作的可行性,采用了模拟线路,提供了模拟路段模拟模拟模拟模拟作业,以展示预期的非线性能。