The application of current generation computing machines in safety-centric applications like implantable biomedical chips and automobile safety has immensely increased the need for reviewing the worst-case error behavior of computing devices for fault-tolerant computation. In this work, we propose an exact probabilistic error model that can compute the maximum error over all possible input space in a circuit specific manner and can handle various types of structural dependencies in the circuit. We also provide the worst-case input vector, which has the highest probability to generate an erroneous output, for any given logic circuit. We also present a study of circuit-specific error bounds for fault-tolerant computation in heterogeneous circuits using the maximum error computed for each circuit. We model the error estimation problem as a maximum a posteriori (MAP) estimate, over the joint error probability function of the entire circuit, calculated efficiently through an intelligent search of the entire input space using probabilistic traversal of a binary join tree using Shenoy-Shafer algorithm. We demonstrate this model using MCNC and ISCAS benchmark circuits and validate it using an equivalent HSpice model. Both results yield the same worst-case input vectors and the highest % difference of our error model over HSpice is just 1.23%. We observe that the maximum error probabilities are significantly larger than the average error probabilities, and provides a much tighter error bounds for fault-tolerant computation. We also find that the error estimates depend on the specific circuit structure and the maximum error probabilities are sensitive to the individual gate failure probabilities.
翻译:将当前生成的计算机机器应用于安全中心应用, 如可移植的生物医学芯片和汽车安全等, 大大增加了审查计算错误时计算器的最大错误行为最坏情况的必要性。 在这项工作中, 我们提出了一个精确的概率错误模型, 能够以电路特定的方式计算所有可能的输入空间的最大错误, 并且能够处理电路中各种类型的结构依赖性。 我们还提供了最坏情况输入矢量, 对任何特定的逻辑电路来说, 最有可能产生错误产出。 我们还对使用为每条电路计算的最大错误计算错误计算器的偏差分范围进行了研究。 我们将错误估计问题作为最大的一个假设( MAP) 估计, 而不是整个电路的联合误差概率函数, 通过对整个输入空间进行明智的搜索, 使用Shenoy- Shafer 算法, 提供最坏情况输入错误的最大概率。 我们用 MCNC 和 ISC 测算器测量电路路, 并使用等的 HSpie 模型进行校准差值计算。 我们用最坏的准确性准确性模型得出了最坏的准确性, 和最高的误差为比 。 我们的误差为最差差差差差的概率 。