项目名称: 面向基于图的数据挖掘的FPGA加速方法研究
项目编号: No.61272070
项目类型: 面上项目
立项/批准年度: 2013
项目学科: 自动化技术、计算机技术
项目作者: 胡昱
作者单位: 华中科技大学
项目金额: 80万元
中文摘要: 高效的"数据挖掘"方法在信息爆炸的"云计算"时代显得尤为重要。现场可编程门阵列(FPGA)是一种灵活的半定制电路,可以在流片以后用软件进行功能定制。尽管很多基于FPGA的"数据挖掘"加速算法在过去的五年中已经被提出,"基于图的数据挖掘"(一种在"知识发现"(KDD)领域的重要技术手段)的FPGA加速算法还没有被深入研究。本项目的核心研究内容是利用FPGA对"基于图的数据挖掘"问题进行硬件加速以及相关的基础科学技术问题。本项目的目标包括:针对"基于图的数据挖掘"问题建立一套高性能、高能效的FPGA的加速IP库、优化和设计FPGA体系结构、设计一套考虑"软错误"的容错FPGA体系结构和CAD算法。本项目所建立的IP库将简化编程模型、提高计算效率,很大程度上扩大"基于图的数据挖掘"的实践应用;同时本项目所提出的新的FPGA体系结构和CAD算法将为FPGA厂商设计下一代FPGA提供依据。
中文关键词: 数据挖掘;现场可编程逻辑阵列;图的数据挖掘;智能医疗;智能交通
英文摘要: In the upcoming cloud computing era, data mining and massive data analysis are required to intelligently exploit the huge volumes of available data. The field programmable gate array (FPGA) is a versatile device, which can be programmed to implement virtual any digital processing function. In this project, we propose to employ an FPGA as a coprocessing unit to augment the traditional CPU-based computing platform to significantly improve the energy efficiency (measured by MB data processed per Joule) and performance of key data mining tasks. While various FPGA-based data mining accelerators have been proposed over the past five years, studies on graph-based data mining (GDM), one of the key techniques for knowledge and information discovery, remains largely unexplored. This proposal specifically targets the GDM area. The proposed research project includes (a) construction of IPs for the acceleration engine; (b) FPGA architectural customization of the acceleration engine; (c) soft error-aware FPGA architecture and CAD algorithms for GDM applications. Throughout the proposed research, we will simultaneously optimize the throughput and energy efficiency. Upon the completion of the proposed project, we expect to deliver a set of high-performance and energy-efficient macros or Intellectual Property (IP) blocks that
英文关键词: data mining;FPGA;graph-based data mining;health care;intelligent transportation