In this paper, we propose a practical and effective approach allowing designers to optimize multi-level cache size at the early system design phase. Our key contribution is to generalize the reuse distance analysis method and develop an effective and practical cache design optimization approach. We adopt a simple scanning search method to locate optimal cache solutions in terms of cache size, power consumption, or average data access delay. The proposed approach is particularly useful for early-phase system designers and is verified to be 150 to 250 times faster than the traditional simulation-based approach. In addition, we also introduce a simplified analytical model and provide designers insights about how cache design parameters may affect the expected results. As a result, designers can make an adequate decision in the early system design phase.
翻译:在本文中,我们提出了一个实际而有效的办法,使设计者能够在早期系统设计阶段优化多级缓存规模。我们的主要贡献是推广再利用远程分析方法,并开发一个有效而实用的缓存设计优化方法。我们采用一种简单的扫描搜索方法,从缓存规模、电耗或平均数据存取延迟等方面找到最佳缓存解决方案。拟议办法对早期系统设计者特别有用,经核实比传统的模拟方法快150至250倍。此外,我们还引入了一个简化的分析模型,为设计者提供关于缓存设计参数如何影响预期结果的见解。因此,设计者可以在早期系统设计阶段作出适当的决定。