超多核处理器片上网络性能模型研究

项目名称： 超多核处理器片上网络性能模型研究

项目编号： No.61073007

项目类型： 面上项目

立项/批准年度： 2011

项目学科： 电工技术

项目作者： 乔林

作者单位： 清华大学

项目金额： 12万元

中文摘要： 随着超多核处理器的发展，片上网络及其通信效率日益成为影响处理器性能的重要因素。然而迄今为止，完善的片上网络性能模型在学界仍付阙如。本研究课题涉及：①#36229;多核处理器的片上网络性能评测技术，设计并实现片上网络模拟器；②#29255;上网络拓扑结构、路由算法及性能模型等。主要解决：①#29255;上网络的通信模型；②#29255;上网络性能评测技术与模拟器；③#29255;上网络拓扑结构、路由算法及性能模型等三个关键问题。本课题拟通过先分析量化性能指标，后建立片上网络通信模式的方式架构性能模型，并在模拟器中实现该通信模式，再使用该模型研究网络拓扑与路由算法等技术难题。本项目提出的片上网络性能模型对未来的超多核处理器设计有重要的指导意义，而针对特定应用程序的超多核处理器片上网络拓扑结构与路由算法，对提升系统整体性能具有较高的实际价值。

中文关键词： 超多核处理器；片上网络；模拟器；性能模型

英文摘要： With the development of many-core processors, network-on-chip and its communication efficiency have an important impact on processor performance. Till now, however, there is no well performance model of network-on-chip. This project studies: (1) evaluation techniques for network-on-chip of many-core processors, and designing and implementing a network-on-chip simulator, and (2) topology structures, routing algorithms and performance models of network-on-chip. The key problems this project is attacking are as follows: (1) the communication model of network-on-chip, (2) performance evaluation techniques for network-on-chip of many-core processors and a network-on-chip simulator, and (3) analysis of topology structures, routing algorithms and performance models of network-on-chip. To model network-on-chip performance, this project first analyzes performance indexes in quantity, constructs communication patterns in network-on-chip, implements them in the simulator, and then studies network topology and routing algorithms. The network-on-chip performance model this project will present is very suggestive of many-core processor design in future and the network-on-chip topology structure and routing algorithm is also valuable to improve the overall system performance.

英文关键词： Many-Core Processor; Network-on-Chip; Simulator; Performance Model