CMOS工艺下高速光电接口接收机关键电路技术研究

项目名称： CMOS工艺下高速光电接口接收机关键电路技术研究

项目编号： No.61474025

项目类型： 面上项目

立项/批准年度： 2015

项目学科： 无线电电子学、电信技术

项目作者： 姜培

作者单位： 复旦大学

项目金额： 92万元

中文摘要： 光纤通信具备低衰减、高带宽的优点，在网络数据中心、高速社区网络等方面得到广泛应用。随着深亚微米集成电路的发展，CMOS工艺已经支持实现光电收发信机集成电路，但高达几十GHz的工作带宽使光电接收机的单片实现存在难度。本项目围绕CMOS工艺下光电接收机电路的关键共性技术进行以下研究：（1）便于集成的高速光电接收机架构和光电混合系统设计方法；（2）探讨高速光电接收机的降噪声技术；（3）研究适用于补偿整个光电信号通路带宽的均衡技术；（4）研究高速、低抖动、高噪声容忍度的时钟与数据恢复技术；（5）研究CMOS工艺下光电接收机集成电路模块的实现技术，采用65nm CMOS工艺实现光电接收机集成电路。该项目致力于解决CMOS工艺下光电接收机系统的关键电路技术问题，为实现实用的光电接收机系统奠定良好基础。

中文关键词： 集成电路设计；数模混合电路；超宽带；低功耗；锁相环

英文摘要： Fiber communication has advantages of low signal attenuation and wide bandwidth. It has been widely used in the data center, community network or other similar areas. With the development of deep-submicron integrated circuits, CMOS technology has been qualified for realizing integrated optoelectronic transceivers. This project focuses on common key techniques in common in integrated high-speed optoelectronic receivers, covering (1) the study on highly integrated architecture of optoelectronic receivers, and design techniques of the optical/electrical mixed-signal system, (2) noise cancellation techniques for high-speed optoelectronic receivers, (3) the research of equalization techniques suitable for the compensation of the whole optical/electrical link, (4) the study on high-speed, low jitter, high jitter tolerance techniques for clock and data recovery, (5) the research for the realization of key modules in the optoelectronic receiver in the 65nm process. This project aims to solve the key techniques in CMOS optical receiver design, which establishes the foundation to realize practical optoelectronic transceivers in future.

英文关键词： Integrated circuit design;mixed-signal circuit;ultra wide band;low power;PLL