This article describes the first public implementation and evaluation of the latest version of the RISC-V hypervisor extension (H-extension v0.6.1) specification in a Rocket chip core. To perform a meaningful evaluation for modern multi-core embedded and mixedcriticality systems, we have ported Bao, an open-source static partitioning hypervisor, to RISC-V. We have also extended the RISC-V platformlevel interrupt controller (PLIC) to enable direct guest interrupt injection with low and deterministic latency and we have enhanced the timer infrastructure to avoid trap and emulation overheads. Experiments were carried out in FireSim, a cycle-accurate, FPGA-accelerated simulator, and the system was also successfully deployed and tested in a Zynq UltraScale+ MPSoC ZCU104. Our hardware implementation was opensourced and is currently in use by the RISC-V community towards the ratification of the H-extension specification.
翻译:本篇文章描述了首次公开实施和评估火箭芯芯芯中RISC-V超视光器最新版本规格(H-extension v0.6.1)的第一次公开实施和评估。为了对现代多芯嵌入和混合临界系统进行有意义的评估,我们已经将开放源静态隔热超视光器Bao移植到RISC-V。 我们还扩展了RISC-V平台级断流控制器(PLIC),以便能够以低度和确定性延迟度直接对客人进行干扰注射,我们加强了定时器基础设施,以避免陷阱和模拟间接费用。在Fiersim进行了实验,这是循环精确的、FPGA加速模拟器,该系统还成功地在Zynq Ultrastra+ MPC ZCUUC104中部署和测试。我们的硬件实施是开源的,目前正由RISC-V社区用于批准H扩展规格。