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计算机体系结构,并行与分布式计算

ASP-DAC 2020

Asia and South Pacific Design Automation Conference

全文截稿: 2019-07-05

开会时间: 2020-01-13

会议难度: ★★★

CCF分类: C类

会议地点: Beijing, China

网址：http://www.aspdac.com/

ASP-DAC 2020 is the 25th annual international conference on VLSI design automation in Asia and South Pacific region, one of the most active regions of design and fabrication of silicon chips in the world. The conference aims at providing the Asian and South Pacific CAD/DA and Design community with opportunities of presenting recent advances and with forums for future directions in technologies related to Electronic Design Automation (EDA). The format of the meeting intends to cultivate and promote an instructive and productive interchange of ideas among EDA researchers/developers and system/circuit/device designers. All scientists, engineers, and students who are interested in theoretical and practical aspects of VLSI design and design automation are welcomed to ASP-DAC.

Original papers in, but not limited to, the following areas are invited.

1. System-Level Modeling and Design Methodology:
1.1. HW/SW co-design, co-simulation and co-verification
1.2. System-level design exploration, synthesis and optimization
1.3. System-level formal verification
1.4. System-level modeling, simulation and validation tools/methodology
2. Embedded Systems and Cyberphysical Systems:
2.1. Many- and multi-core SoC architecture
2.2. IP/platform-based SoC design
2.3. Domain-specific architecture
2.4. Dependable architecture
2.5. Cyber physical system
2.6. Internet of things
3. Embedded Systems Software:
3.1. Kernel, middleware and virtual machine
3.2. Compiler and toolchain
3.3. Real-time system
3.4. Resource allocation for heterogeneous computing platform
3.5. Storage software and application
3.6. Human-computer interface
4. Memory Architecture and Near/In Memory Computing:
4.1. Storage system and memory architecture
4.2. On-chip memory architectures and management: Scratchpads, compiler, controlled memories, etc.
4.3. Memory and storage hierarchies with emerging memory technologies
4.4. Near-memory and in-memory computing
4.5. Memory architecture and management for emerging memory technologies
5. Neural Network and Neuromorphic Computing:
5.1. Hardware and devices for neuromorphic and neural network computing
5.2. Design method for learning on a chip
5.3. Systems for neural computing (including deep neural networks)
5.4. Neural network acceleration techniques including GPGPU, FPGA and dedicated ASICs
5.5. CAD for bio-inspired and neuromorphic systems
6. Analog, RF, Mixed Signal, and Photonics:
6.1. Analog/mixed-signal/RF synthesis
6.2. Analog layout, verification, and simulation techniques
6.3. High-frequency electromagnetic simulation of circuit
6.4. Mixed-signal design consideration
6.5. Communication architectures using nanophotonics, RF, 3D, etc.
6.6. Networks-on-chip and NoC-based system design
7. Lower Power Design and Approximate Computing:
7.1. Power modeling, analysis and simulation
7.2. Low-power design and methodology
7.3. Thermal aware design
7.4. Energy harvesting and battery management
7.5. Hardware techniques for approximate/stochastic computing
8. Logic/High-Level Synthesis and Optimization:
8.1. High-level synthesis tool and methodology
8.2. Combinational, sequential and asynchronous logic synthesis
8.3. Logic synthesis and physical design technique for FPGA
8.4. Technology mapping
9. Physical Design:
9.1. Floorplanning, partitioning and placement
9.2. Interconnect planning and synthesis
9.3. Placement and routing optimization
9.4. Clock network synthesis
9.5. Post layout and post-silicon optimization
9.6. Package/PCB/3D-IC routing
10. Design for Manufacturability and Reliability:
10.1. Reticle enhancement, lithography-related design and optimization
10.2. Resilience under manufacturing variation
10.3. Design for manufacturability, yield, and defect tolerance
10.4. Reliability, aging and soft error analysis
10.5. Design for reliability, aging, and robustness
10.6. Machine learning for smart manufacturing and process control
11. Timing and Signal/Power Integrity:
11.1. Deterministic/statistical timing and performance analysis and optimization
11.2. Power/ground and package modeling, analysis and optimization
11.3. Signal/power integrity, EM modeling and analysis
11.4. Extraction, TSV and package modeling
11.5. 2D/3D on-chip power delivery network analysis and optimization
12. Testing, Validation, Simulation, and Verification:
12.1. ATPG, BIST and DFT
12.2. System test and 3D IC test
12.3. Online test and fault tolerance
12.4. Memory test and repair
12.5. RTL and gate-leveling modeling, simulation, and verification
12.6. Circuit-level formal verification
12.7. Device/circuit-level simulation tool and methodology
13. Hardware and Embedded Security:
13.1. Hardware-based security
13.2. Detection and prevention of hardware Trojans
13.3. Side-channel attacks, fault attacks and countermeasures
13.4. Design and CAD for security
13.5. Cyberphysical system security
13.6. Nanoelectronic security
13.7. Supply chain security and anti-counterfeiting
14. Emerging Technologies and Applications:
14.1. Biomedical, biochip, and biodata processing
14.2. Big/thick data, datacenter
14.3. Advanced multimedia application
14.4. Energy-storage/smart-grid/smart-building design and optimization
14.5. Automotive system design and optimization
14.6. New transistor/device and process technology: spintronic, phase-change, single-electron etc.
14.7. Nanotechnology, MEMS, quantum computing etc.

人工智能

ACML 2019

Asian Conference on Machine Learning

全文截稿: 2019-07-15

开会时间: 2019-11-17

会议难度: ★★★

CCF分类: C类

会议地点: Nagoya, Japan

网址：http://www.acml-conf.org

The 11th Asian Conference on Machine Learning (ACML 2019) will take place on November 17 - 19, 2019 at WINC AICHI, Nagoya, Japan. The conference aims to provide a leading international forum for researchers in machine learning and related fields to share their new ideas, progresses and achievements. Submissions from regions other than the Asia-Pacific are also highly encouraged.  

The conference calls for high-quality, original research papers in the theory and practice of machine learning. The conference also solicits proposals focusing on frontier research, new ideas and paradigms in machine learning. We encourage submissions from all parts of the world, not only confined to the Asia-Pacific region.  

This year we are running two publication tracks: Authors may submit either to the conference track, for which the proceedings will be published as a volume of Proceedings of Machine Learning Research Workshop and Conference Proceedings (PMLR), or to the journal track for which accepted papers will appear in a special issue of the Springer journal Machine Learning (MLJ).  

ACML2019 Website: http://www.acml-conf.org/2019/  

ACML2019 CFP: http://www.acml-conf.org/2019/calls/papers/  

Important Dates  

(Journal Track: the accepted papers will be published from Machine Learning Journal)  
**Deadline is extended**  
May.03, 2019: Paper Submission Deadline  
Jun.15, 2019: Review Result Released (Accept, Minor Revision, or Reject)  
Jul.15, 2019: Revision Submission Deadline  
Sep.03, 2019: Notification (Accept or Reject)  
Sep.30, 2019: Camera-Ready Submission Deadline  


(Conference Track: the accepted papers will be published from Proceedings of Machine Learning Research)  

Conference track 1st round  
Apr.15, 2019: Submission Deadline  
May.30, 2019: Notification (Accept, Reject, or Encourage Resubmission to 2nd Round)  
Sep.30, 2019: Camera-Ready Submission Deadline  

Conference track 2nd round  
Jul.15, 2019: Submission Deadline  
Aug.19, 2019 - Aug.24, 2019: Author Rebuttal  
Sep.03, 2019: Notification (Accept or Reject)  
Sep.30, 2019: Camera-Ready Submission Deadline

计算机体系结构,并行与分布式计算

ICPADS 2019

International Conference on Parallel and Distributed Systems

摘要截稿: 2019-07-14

全文截稿: 2019-07-21

开会时间: 2019-12-04

会议难度: ★★★

CCF分类: C类

会议地点: Tianjin, China

网址：http://www.icpads2019.cn/

The International Conference on Parallel and Distributed Systems (ICPADS) provides a great platform for researchers to share the cutting-edge ideas, new research trends, and latest outcomes in parallel/distributed computing, networking, systems, algorithms, frameworks, and architectures. The 25th IEEE ICPADS will be held in Tianjin, China, in December 2019. Tianjin is a modern and developed city with a long history of 600 years, retaining an authentic Chinese lifestyle. IEEE ICPADS 2019 includes six technical tracks: Fog & Edge Computing, Mobile & Ubiquitous Computing, Internet of Things & Cyber-Physical Systems, Distributed & High Performance Computing, Security & Dependable Computing, Big Data & Cloud Computing.

Original, unpublished contributions are solicited covering the general aspects of parallel and distributed systems. Topics of interest include, but are not limited to:

Parallel and Distributed Applications and Algorithms
Cloud OS, Middleware, Toolkits, and Applications
Data Intensive Computing and Data Centre Architecture
Big Data Platforms
High Performance Computational Biology and Bioinformatics
Power-Aware and Green Computing
Security and Privacy
Dependable and Trustworthy Computing and Systems
Internet of Things
Fog/Edge Computing
Cyber-Physical Systems and Sensor Networks
Embedded systems
Real-Time and Multimedia Systems
Operating Systems, Distributed and Parallel Systems
Communication and Networking Systems
Ubiquitous and Mobile Computing
Peer-to-Peer Computing
Multi-Core and Multithreaded Architectures
Virtualization Techniques
Resource Provision, Management, and Scheduling
Cluster and Grid Computing
Web-Based Computing and Service-oriented Architecture
Performance Modelling and Evaluation

计算机综合与前沿

APBC 2019

Asia Pacific Bioinformatics Conference

全文截稿: 2019-07-30

开会时间: 2019-01-14

会议难度: ★★★

CCF分类: C类

会议地点: Wuhan, China

网址：Wuhan, China

APBC2019 invites high-quality original full papers on any topic related to Bioinformatics and Computational Biology.  

The submitted papers must have not been published or under consideration for publication in any other journal or conference with formal proceedings.  

All accepted papers will have to be presented by one of the authors at the conference.

Accepted papers will be invited to be published in the journals BMC Genomics, BMC Bioinformatics, BMC Systems Biology, IEEE/ACM TCBB, CBC following the journals' publication policy.  

计算机体系结构,并行与分布式计算

ATS 2019

IEEE Asian Test Symposium

全文截稿: 2019-08-30

开会时间: 2019-12-10

会议难度: ★★★

CCF分类: C类

会议地点: Kolkata, India

网址：http://ats2019.iiests.ac.in/

The Asian Test Symposium (ATS) provides an open forum dedicated to the electronic test of devices, boards and systems—covering the complete test cycle from design verification, design-for- test, design-for- manufacturing, silicon debug, manufacturing test, system test, diagnosis, reliability and failure analysis, and back to process and design improvement. The main goal of organizing IEEE Asian Test Symposium (ATS 2019) is to promote discussions and scientific exchange of knowledge between researchers, developers, engineers, academicians and students working in India and abroad. At ATS 2019, the design, test, and yield challenges faced by the industry are being addressed by the combined efforts of academia, design tool and equipment suppliers, designers, and test engineers.

The 28th IEEE Asian Test Symposium (ATS 2019) is going to be held at Kolkata, India during December 10-13, 2019 in collaboration with IIEST Shibpur, IIT Kharagpur, ISI Calcutta, Calcutta University and Jadavpur University.

The theme for the conference this year is “Testing in the Era of AI and Autonomous System“. This 4 day conference comprises: first day (10th December, 2019) of Tutorial followed by main conference during the last three days (December 11-13, 2019).

The organizing committee of ATS 2019 invites you all to Kolkata, the City of Joy.

Original papers on, but not limited to, the following areas are invited:

• Analog/Mixed-Signal Test
• Automatic Test Generation
• Board Test and Diagnosis
• Boundary Scan Test
• Built-In Self-Test (BIST)
• Defect-Based Test
• Delay and Performance Test
• Dependability and Functional Safety
• Design for Test (DFT)
• Diagnosis and Silicon Debug
• Economic of Test
• Failure Analysis
• Fault Modeling and Simulation
• Fault Tolerance
• GPU Test
• High-Speed I/O Test
• Low-Power IC Test
• Memory Test and Repair
• Test for MEMS and Microfluidic Systems
• Multi-/Many-core Processor Test
• Test for Nanoscale Devices and Emerging Technologies
• On-line Test
• Power/Thermal/Reliability Issues in Test
• Reconfigurable System Test
• Test for Biomedical Circuits and Systems
• RF Test
• Hardware-oriented Security and Trust
• Self-Repair
• Test for Sensors and IoT
• SiP, Stacked, 3D IC Test
• Standards in Test
• Machine Learning in Test
• Test Compression
• Test Quality
• Test Synthesis
• Validation and Verification
• Yield Analysis and Enhancement
• Test for Reversible and Quantum Circuits

信息安全及密码学

IFIP WG 11.9 2020

IFIP WG 11.9 International Conference on Digital Forensics

全文截稿: 2019-09-15

开会时间: 2020-01-06

会议难度: ★★★

CCF分类: C类

会议地点: New Delhi, India

网址：http://www.ifip119.org/Conferences/

The IFIP Working Group 11.9 on Digital Forensics (www.ifip119.org) is an active international community of scientists, engineers and practitioners dedicated to advancing the state of the art of research and practice in digital forensics. The Sixteenth Annual IFIP WG 11.9 International Conference on Digital Forensics will provide a forum for presenting original, unpublished research results and innovative ideas related to the extraction, analysis and preservation of all forms of electronic evidence. Papers and panel proposals are solicited. All submissions will be refereed by a program committee comprising members of the Working Group. Papers and panel submissions will be selected based on their technical merit and relevance to IFIP WG 11.9. The conference will be limited to approximately 100 participants to facilitate interactions between researchers and intense discussions of critical research issues. Keynote presentations, revised papers and details of panel discussions will be published as an edited volume – the sixteenth volume in the well-known Research Advances in Digital Forensics book series (Springer, Cham, Switzerland) during the summer of 2020.

Technical papers are solicited in all areas related to the theory and practice of digital forensics. Areas of special interest include, but are not limited to:
- Theories, techniques and tools for extracting, analyzing and preserving digital evidence
- Enterprise and cloud forensics
- Embedded device forensics
- Internet of Things forensics
- Digital forensic processes and workflow models
- Digital forensic case studies
- Legal, ethical and policy issues related to digital forensics

计算机体系结构,并行与分布式计算

FAST 2020

Conference on File and Storage Technologies

全文截稿: 2019-09-26

开会时间: 2020-02-24

会议难度: ★★★★★

CCF分类: A类

会议地点: SANTA CLARA, CA, USA

网址：https://www.usenix.org/conference/fast20

The 18th USENIX Conference on File and Storage Technologies (FAST '20) brings together storage-system researchers and practitioners to explore new directions in the design, implementation, evaluation, and deployment of storage systems. The program committee will interpret "storage systems" broadly; papers on low-level storage devices, distributed storage systems, and information management are all of interest. The conference will consist of technical presentations including refereed papers, Work-in-Progress (WiP) reports, poster sessions, and tutorials.

Topics of interest include but are not limited to:

Archival storage systems
Auditing and provenance
Big data, analytics, and data sciences
Caching, replication, and consistency
Cloud storage
Data deduplication
Database storage
Distributed and networked storage (wide-area, grid, peer-to-peer)
Empirical evaluation of storage systems
Experience with deployed systems
File system design
High-performance file systems
Key-value and NoSQL storage
Memory-only storage systems
Mobile, personal, embedded, and home storage
Parallel I/O and storage systems
Power-aware storage architectures
RAID and erasure coding
Reliability, availability, and disaster tolerance
Search and data retrieval
Solid state storage technologies and uses (e.g., flash, byte-addressable NVM)
Storage management
Storage networking
Storage performance and QoS
Storage security

信息安全及密码学

EUROCRYPT 2019

European Cryptology Conference

全文截稿: 2019-10-04

开会时间: 2019-05-19

会议难度: ★★★★★

CCF分类: A类

会议地点: Darmstadt, Germany

网址：https://eurocrypt.iacr.org/2019/

is the 38th Annual International Conference on the Theory and Applications of Cryptographic Techniques. Eurocrypt is one of the three flagship conferences of the International Association for Cryptologic Research (IACR).

will take place in on . It is organized by the Cryptoplexity group of TU Darmstadt.

The main conference will take place in the Darmstadtium congress center (map). The affiliated events will take place in the University building karo 5 just opposite of the congress center (map). For more information about how to get there see the travel information.

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