From micro-OPs to abstract resources: constructing a simpler CPU performance model through microbenchmarking

In a super-scalar architecture, the scheduler dynamically assigns micro-operations ({\mu}ops) to execution ports. The port mapping of an architecture describes how an instruction decomposes into {\mu}ops and lists for each {\mu}ops the set of ports it can be mapped to. It is used by compilers and performance debugging tools to characterize the performance throughput of a sequence of instructions repeatedly executed as the core component of a loop. This paper introduces a dual equivalent representation: The resource mapping of an architecture is an abstract model where, to be executed, an instruction must use a set of abstract resources, themselves representing combinations of execution ports. For a given architecture, finding a port mapping is an important but difficult problem. Building a resource mapping is a more tractable problem and provides a simpler and equivalent model. This paper describes PALMED, a tool that automatically builds a resource mapping for pipelined, super-scalar, out-of-order CPU architectures. PALMED does not require hardware performance counters, and relies solely on runtime measurements. We evaluate the pertinence of our dual representation for throughput modeling by extracting a representative set of basic-blocks from the compiled binaries of the SPEC CPU 2017 benchmarks~\cite{SPECCPU2017}. We compared the throughput predicted by existing machine models to that produced by \tool, and found comparable accuracy to state-of-the art tools, achieving sub-10 \% mean square error rate on this workload on Intel's Skylake microarchitecture.