3D堆叠众核处理器共享存储访问均衡性研究

项目名称： 3D堆叠众核处理器共享存储访问均衡性研究

项目编号： No.61502508

项目类型： 青年科学基金项目

立项/批准年度： 2016

项目学科： 自动化技术、计算机技术

项目作者： 陈小文

作者单位： 中国人民解放军国防科技大学

项目金额： 21万元

中文摘要： 随着集成电路技术的快速发展，片上系统逐渐由基于总线的单核或少量多核结构发展到基于片上网络和分布式共享存储的大量多核（众核）结构，并采用3D堆叠技术，该结构称为3D堆叠众核处理器，是支撑片上高性能并行计算的有效途径。在3D堆叠众核处理器中，二级分布式共享存储的划分和组织方式、并行访存请求竞争、3D片上网络延时差异等使得共享存储访问的均衡性问题日趋严重，成为系统性能瓶颈。本项目拟针对3D堆叠众核处理器的共享存储访问均衡性问题展开深入研究，突破3D堆叠众核处理器访存关键技术，取得原创性研究成果。主要研究内容包括：1）面向访存均衡性的二级分布式共享存储划分技术；2）支持均衡响应的并行存储编组和并发访存调度技术；3）支持均衡响应的DRAM访存请求调度技术；4）基于可变优先级和总路由时长预测的均衡流控技术。最后，将建立具有共享存储访问均衡性的128核以上的3D堆叠众核处理器模拟平台和FPGA仿真环境。

中文关键词： 众核处理器；片上网络；共享存储；访问均衡性

英文摘要： With the rapid development of integrated circuit technology, System-on-Chips (SoCs) are evolving from bus-based single core/multi-core architectures to network and DSM-based many-core architectures using 3D stack technology, named 3D stacked many-core processors, thus becoming the efficient way of supporting on-chip high-performance parallel computing. In 3D stacked many-core processors, the partitioning and organization of level 2 distributed and shared memories, parallel memory access conflicts in target memory controllers, and the delay difference of parallel memory access requests routing in 3D NoC make the equalization problem of shared memory access be more serious, which becomes the heavy bottleneck of the system performance. Therefore, we plan to carry out deep research on the equalization of shared memory accesses in 3D stacked many-core processors, break through the key technologies of shared memory access in 3D stacked many-core processors, and gain some innovative results. The main work includes: 1) memory access equalization oriented level 2 distributed shared memory organization technique; 2) parallel memories grouping and parallel requests scheduling technique that supports equalized responses; 3) DRAM requests scheduling technique supporting equalized responses; and 4) fair flow control technique based on variable priority and the prediction of total routing delay. Finally, we will construct the simulation platform and the FPGA emulation environment of the 3D stacked many-core processor that contains more than 128 cores and supports shared memory access equalization.

英文关键词： Many-core Processor;Network-on-Chip;Shared Memory;Memory Access Equalization