Secure computation is of critical importance to not only the DoD, but across financial institutions, healthcare, and anywhere personally identifiable information (PII) is accessed. Traditional security techniques require data to be decrypted before performing any computation. When processed on untrusted systems the decrypted data is vulnerable to attacks to extract the sensitive information. To address these vulnerabilities Fully Homomorphic Encryption (FHE) keeps the data encrypted during computation and secures the results, even in these untrusted environments. However, FHE requires a significant amount of computation to perform equivalent unencrypted operations. To be useful, FHE must significantly close the computation gap (within 10x) to make encrypted processing practical. To accomplish this ambitious goal the TREBUCHET project is leading research and development in FHE processing hardware to accelerate deep computations on encrypted data, as part of the DARPA MTO Data Privacy for Virtual Environments (DPRIVE) program. We accelerate the major secure standardized FHE schemes (BGV, BFV, CKKS, FHEW, etc.) at >=128-bit security while integrating with the open-source PALISADE and OpenFHE libraries currently used in the DoD and in industry. We utilize a novel tile-based chip design with highly parallel ALUs optimized for vectorized 128b modulo arithmetic. The TREBUCHET coprocessor design provides a highly modular, flexible, and extensible FHE accelerator for easy reconfiguration, deployment, integration and application on other hardware form factors, such as System-on-Chip or alternate chip areas.
翻译:涉及到PII信息时,安全计算对于国防部门、金融机构、医疗保健等领域都具有关键意义。传统的安全技术要求在进行任何计算之前解密数据。当在不受信任的系统上处理时,解密数据容易遭受攻击并被窃取敏感信息。为了解决这些漏洞,完全同构加密(FHE)在计算过程中保持数据加密,并在不受信任的环境中保护结果的安全性。然而,FHE需要大量计算才能执行等效的非加密操作。为了有用,FHE必须显著缩小计算差距(在10倍以内),以使加密处理变得实用。为了实现这个雄心勃勃的目标,TREBUCHET项目正在领导FHE处理硬件的研究和开发,以加速对加密数据进行深度计算,作为DARPA MTO Data Privacy for Virtual Environments(DPRIVE)计划的一部分。我们加速主要的安全标准化FHE方案(BGV、BFV、CKKS、FHEW等),在>=128位安全性的同时与国防部门和工业界当前使用的开源PALISADE和OpenFHE库进行集成。我们利用一种新颖的瓷砖式芯片设计,具有高度并行的ALUs,优化了向量化的128b模算术。TREBUCHET协处理器设计提供了一个高度模块化、灵活、可扩展的FHE加速器,易于重新配置、部署、集成和应用于其他硬件形态,如片上系统(SoC)或备用芯片区域。