This paper introduces a novel 32-bit microprocessor, based on the RISC-V instruction set architecture, is designed,utilising a dynamic clock source to achieve high efficiency, overcoming the limitations of hardware delays. In addition, the microprocessor is also aimed to operate with both base (32-bit) instructions and 16-bit compressed instructions. The testing of the design is carried out using ModelSim with an ideal result.
翻译:本文介绍了基于RISC-V指令设置结构的新型32位微处理器,设计该微处理器是为了利用动态时钟源实现高效,克服硬件延误的局限性,此外,微处理器还旨在使用基(32位)指令和16位压缩指令进行操作。设计测试使用ModelSim进行,结果理想。