基于多值自旋磁存储器的高速缓存结构及调度技术研究

项目名称： 基于多值自旋磁存储器的高速缓存结构及调度技术研究

项目编号： No.61472322

项目类型： 面上项目

立项/批准年度： 2015

项目学科： 自动化技术、计算机技术

项目作者： 王党辉

作者单位： 西北工业大学

项目金额： 80万元

中文摘要： 片上处理器核数目的不断增加需要更深的Cache层次和更大的Cache容量来满足日益增长的带宽需求。传统的SRAM单元尺寸大、静态功耗高，而eDRAM的加工工艺复杂，因此在未来的大容量Cache结构中均不具有吸引力。自旋磁存储器具有数据非易失、静态功耗极小、单元面积小、读取速度快且与流行的CMOS加工工艺兼容等特点，已经成为未来构造大容量Cache的候选器件之一。多值单元技术促使自旋磁存储器的单元密度进一步增大。本项目拟研究使用多值自旋磁存储器构造Cache结构的方法，提出相应的Cache调度策略；研究多值自旋磁存储器状态翻转错误率的精确表征方法，提出针对自旋磁存储器单元错误率不平衡特性的内容相关的纠错码技术；研究应用程序对Cache写操作的特性，提出使写操作尽可能均匀分布以延长多值自旋磁存储器Cache寿命的调度。本项目的开展有助于缓解多核/众核处理器中存在的存储墙、功耗墙和带宽墙等问题。

中文关键词： 自旋转移矩磁存储器；可靠性；寿命感知；非对称写通道模型；高速缓存

英文摘要： While the number of processor cores integrated on chips have continuously incresing with the scaling offered by Moore's law, deeper cache hierarchy and larger cache capacity has been observed in contemporary multi-core/manycore processor designs. However, conventional SRAM and eDRAM are facing constraints of cell area and leakage energy consumption with technology scaling and eDRAM also require a complex capacitor fabrication process, they are less attractive in future Cache memories. Spin transfer-torque magnetic RAM (STT-RAM or STT-MRAM) on the other hand is gaining popularity in the research community due to its compact bit-cell structure, good read performance, good scalabilty, non-volatility (also means that standby power is zero) and compatibility with coventional CMOS technology. Multi-level-cell (MLC) technology will further increase the cell density. This project proposes using MLC STT-RAM to construct Cache at the architectural level and proposes the corresponding schedule schemes. We will also focus on how to calculate the error fliping rate precisely for STT-RAMs and propose a content-dependent error correcting coding (ECC) technique which takes the asymmetric write error rates of MLC STT-RAMs in cosideration.To extend the lifetime of the STT-RAM based Caches, the characteristic of write operation will be analyzed and a scheme which will make the write operation to all the Cache blocks even will also be proposed. This project will unleash the memroy wall, power wall and bandwidth wall of Multi-core/manycore processors.

英文关键词： Spin-Transfer Torque Magnetic RAM;Reliabiltity;Lifetime Aware;Asymmetric Write Channel Model;Cache