项目名称: 片上网络功耗-性能空时特性分析及功率最优化动态分配方法研究
项目编号: No.61306024
项目类型: 青年科学基金项目
立项/批准年度: 2014
项目学科: 无线电电子学、电信技术
项目作者: 王小航
作者单位: 华南理工大学
项目金额: 25万元
中文摘要: 基于片上网络的多核/众核芯片广泛应用于各领域。其性能不断增长的同时功耗亦快速增长。因功率预算无法满足未来半导体芯片峰值功耗需求,片上很大一部分晶体管将不得不停止工作。如何在功率预算受限情况下,使系统功耗适应功率预算,并优化性能,成为亟需解决的问题。而且,功率预算随时间和空间变化,使该问题异常复杂。 本课题以功率预算空时特性为切入点,旨在研究如何根据该特性进行优化功率分配,优化系统性能。 拟通过建立感知功率预算时间和空间变化特性的众核系统性能-功耗模型,考虑多种众核系统结构、参数、应用特性,可调节众多变量,提高性能和功率控制范围;在模型的基础上,动态功率分配方法采用自顶向下层次化分解和分布式计算的方法,降低功率分配计算实时求解的开销和复杂度。并进行软件仿真和硬件模拟验证,评估模型准确性、功率分配方法有效性和可行性。 可作为进一步研究功率自适应片上系统的线索,亦可推进高效能计算研究。
中文关键词: 性能-功耗模型;功率预算分配方法;;;
英文摘要: Powerful networks-on-chip-based multi/many-core chip systems have found wide applications in various areas that are thirst for performance. The ever increasing chip performance, however, comes with explosive growth in power consumption. It has been perceived that this power problem will soon escalate to a very dangerous point that the peak power request of a many-core chip will well exceed its power budget. Consequently, a large percentage of the transistors (up to 50%) in future chips may have to be powered off, which obviously have severely adverse implications on the chip performance. Such power-budget-induced performance problem becomes even much harder to address, given the fact that the chip power budget itself actually varies from time to time (i.e., with temporal variation) and from location to location (i.e., with spatial variation). In the literature, there has been little work that attempted to tackle the problems that are, for the first time, formally defined in this proposal. Starting from the spatial-temporal characteristics of power budget, this proposal herein proposes to develop a scheme that allows a many-core chip's power consumption to be adaptively adjusted so that it can conform to its power budget while achieving optimized overall chip performance. As so, novel solutions are proposed, inc
英文关键词: Performance-power model;Power budgeting;;;