项目名称: 基于广义折叠技术的集成电路测试关键技术研究
项目编号: No.61306046
项目类型: 青年科学基金项目
立项/批准年度: 2014
项目学科: 无线电电子学、电信技术
项目作者: 詹文法
作者单位: 安庆师范学院
项目金额: 25万元
中文摘要: 测试数据量的增加导致测试成本的增加是集成电路测试所面临的主要问题之一。本课题提出一种有效的基于广义折叠技术的集成电路测试技术方案,以期达到减少自动测试设备与被测电路之间的总体数据传输量和传输通道数,节约测试成本的目的。具体包括:(1)提出一种按广义折叠规律生成测试向量的自动测试向量生成算法,在测试生成时就考虑压缩,使生成的测试集符合广义折叠规律,这样就可以根据该规律压缩该测试集;(2)研究广义折叠规律,提出一种基于广义折叠技术的集成电路测试方案,能够将对整个广义折叠集的存储变换成对广义折叠种子和广义折叠规律的存储。课题提出一种按广义折叠规律生成测试向量的自动测试向量生成算法,并开发出一种基于广义折叠技术的集成电路测试技术方案,期望其压缩比达到1000以上,以满足集成电路测试发展趋势的要求。计划申请2-3项专利,发表5-8篇高水平论文,开发EDA软件包及使用说明书1-2份。
中文关键词: 广义折叠集;整数存储无理数;逻辑运算;分组近似相容;测试数据压缩
英文摘要: The high cost of integrated circuit test resulting from the increased amount of test data is one of the main problems that integrated circuit test confronts. A kind of effective technical solutions in integrated circuit test based on reconfigurable network are put forward in this research, aiming at reducing the amount of overall data transmission and the transmission channel number between automatic test equipments and the circuit under test, and this saving test cost. It specifically includes: (1) putting forward a kind of automatic test vector generation algorithm according to generalized folding law, considering compression it when the test vector generates and making the generated test set accord with generalized folding law, so that the test set can be compressed according to the law; (2) studying the test technology in integrated circuit based on reconstructable network, putting forward a new test structure based on reconfigurable network, in which the storage of generalized folding set can be transformed into the storage of generalized folded seeds and the generalized folding law. This research also attempts to recommend a kind of automatic test vector generation algorithm according to the test parterns generated by generalized folding law, and develope a BOST plan. We expect the compression ratio can be
英文关键词: Generalized folding set;Integer storage irrational Numbers;Logical operation;Grouping approximate compatability;Test data compression