面向高性能可视化计算的体系结构优化设计关键技术研究

项目名称： 面向高性能可视化计算的体系结构优化设计关键技术研究

项目编号： No.61202129

项目类型： 青年科学基金项目

立项/批准年度： 2013

项目学科： 计算机科学学科

项目作者： 吕雅帅

作者单位： 中国人民解放军装备学院

项目金额： 24万元

中文摘要： 面向可视化计算的图形众核处理器发展正处于一个新的转折时期：为了能够支持各种高级可视化效果的表现，图形处理器的主要运算负载正由基于顶点与像素的传统图形计算转变为全局光照计算、碰撞检测、近似物理仿真、图像处理甚至人工智能等非传统高性能可视化计算。而当前图形众核处理器无论是在并行计算模型还是体系结构设计方面，均难以满足未来高性能可视化计算的需求。本课题紧跟高性能可视化计算的发展趋势，深入研究支持各种非传统高性能可视化计算的并行计算模型与相应体系结构支撑机制，并研究各种基于体系结构的优化设计技术，解决当前众核图形处理器在任务与线程管理、片上存储、功耗管理等方面存在的问题。本课题研究工作的成果对面向未来高性能可视化计算众核处理器体系结构技术的发展有着重要的理论意义和实用价值。

中文关键词： 众核处理器；可视化计算；通用计算图形处理器；体系结构优化；

英文摘要： The many-core graphics processors for computer visual computings are in the midst of a major transition: for supporting various advanced effects of visualization, the main workloads of graphics processors are changing from vertices and pixels based graphics computings to non-conventional high performance visual computings such as global rendering, collision detection, approximate physics simulations, graphics processing, even AI. computings. However, the parallel computation pattern and the architecture designs of current many-core graphics processors are far from meeting the requirments of these future non-conventional high performance visual computings. By closely following the trend of high performance visual computings, the parallel computation pattern and the processor architecture supporting mechanisms will be thoroughly studied in this project, and the architecture optimization techniques will also be exlpored for solving the problems lies in tasks and threads management, on-chip storage, and power control of current many-core graphics processors. The results of this research project will have significant theory and pratical values for the evolution of the high performance many-core processor architecture techniques.

英文关键词： Many-core processor；Graphics computing；GPGPU；Architecture optimization；