非均匀众核处理器通讯系统吞吐量优化设计与评估方法研究

项目名称： 非均匀众核处理器通讯系统吞吐量优化设计与评估方法研究

项目编号： No.61303036

项目类型： 青年科学基金项目

立项/批准年度： 2014

项目学科： 自动化技术、计算机技术

项目作者： 任鹏举

作者单位： 西安交通大学

项目金额： 25万元

中文摘要： 在芯片制造过程中由于工艺参数波动，导致芯片内部器件和互连线的实际性能与设计指标之间的漂移，即使初衷为构建同构众核处理器，实际生产制造将导致众核处理器呈现异质分布，同时，芯片上不可避免的故障、MPSoC集成不规则IP以及多任务并发映射导致构造均匀一致的众核处理器变得越发困难。当前，国内外学者虽然普遍意识到该问题，但是还缺乏对非均匀众核处理器通信系统全面系统的研究，本课题是国际上首次探索构成非均匀众核处理器的四种原因的共性特征，通过分析应用程序的通信需求和非均匀众核处理器通信系统资源，以提高系统吞吐量为研究目标，设计提出了综合路由算法、通信资源分配策略以及路由器微体系结构设计的解决方案，通过软件仿真和FPGA验证，完成对众核处理器通信系统性能的评估。并设计了开源的众核仿真器和FPGA仿真平台提供给学术界，用于众核处理器的研究。本研究对探索非均匀众核处理器通信系统具有重要的参考价值。

中文关键词： 异构众核处理器；众核处理器通讯系统；片上互连网络；可编程逻辑阵列；

英文摘要： Shrinking process technologies exacerbates process variations-the deviation of process parameters from their target specifications. In the context of multi-core CMPs, which are implemented to feature homogeneous cores, within-die process variations result in substantially different core frequencies，at the same time, the inevitable failure on the chip, MPSoC integrated the irregularly IP core, as well as multi-task concurrent mapping , As a result, building an homogeneous manycore processors become more and more difficult. Recently, scientist generally aware of the problem, however, without a comprehensive and systematic study of the non-homogeneous manycore processor communication system, to the best of our knowledge, this project is the first time exploring four common reasons constitutes a non-homogeneous manycore processor, through a comprehensive analysis of the communication requirements of the application, as well as the underlying communication system. We proposed a solution aim to maximize system throughput, combining routing algorithm, communication resource allocation strategies, and router micro-architecture design. we use software simulator and FPGA to complete the evaluation. And the open-sourced Simulator and FPGA simulation platform are available for exploring manycore system. This work provides

英文关键词： Heterogeneous Manycore；Communication System for Manycore；On-Chip Network；FPGA；