CCF B类 | 给你意大利的热情，HiPEAC 2020诚邀稿件

会议基本信息

会议简称

HiPEAC 2020

会议全称

International Conference on High-Performance Embedded Architectures and Compilers

会议地点

Bologna, Italy

会议难度

★★★★

会议官网

https://www.hipeac.net

CCF分类

B类

会议简介

The HiPEAC conference is the premier European forum for experts in computer architecture, programming models, compilers and operating systems for embedded and general-purpose systems.

 

The 15th HiPEAC conference will take place in Bologna, Italy from Monday 20 January to Wednesday 22 January, 2020. Associated workshops, tutorials, special sessions, several large poster sessions and an industrial exhibition will run in parallel with the conference. The three-day event attracts over 500 delegates each year.

会议特点

Journal-first publication model

HiPEAC has been pioneering the journal-first publication model. Journal-first means that the manuscript selection process for the conference is outsourced to a journal (ACM TACO，CCF B类). Manuscripts can be submitted to the journal at any time throughout the year as regular journal submissions. For all manuscripts submitted before 1 June, ACM TACO guarantees that the final decision (including two rounds of revision) will be communicated before 15 November. All authors of original work papers accepted in the journal between 15 November 2018 and 15 November 2019 will get an invitation to present their work during the paper track of the HiPEAC conference. There are no conference proceedings published.

重要日期

截稿日期

2019-06-01

开会日期

2020-01-20

Topics

Topics of interest include, but are not limited to:

• Processor, memory, interconnect, and storage architectures

• Parallel, multi-core and heterogeneous systems

• Interconnection networks

• Architectural support for programming productivity

• Power, performance and implementation efficient designs

• Reliability and real-time support in processors, compilers and run-time systems

• Application-specific processors, accelerators and reconfigurable processors

• Architecture and programming environments for GPU-based computing

• Architectural simulation and methodology

• Architectural and run-time support for programming languages

• Programming models, frameworks and environments for exploiting parallelism

• Compiler techniques

• Feedback-directed optimization

• Program characterization and analysis techniques

• Dynamic compilation, adaptive execution, and continuous profiling/optimization

• Binary translation/optimization

• Code size/memory footprint optimizations

• Architectures for emerging technologies such as neuromorphic, photonics, quantum, etc.

组委会

GENERAL CHAIR

Luca Fanucci, University of Pisa

PROGRAM CHAIR

Valeria Bertacco, University of Michigan

WORKSHOPS & TUTORIALS CHAIRS 

Sascha Uhrig, Airbus R&T

Daniela Cancila, CEA

POSTER CHAIR

Koen De Bosschere, Ghent University

SPONSOR CHAIR

Andrea Bartolini, University of Bologna

INDUSTRIAL SESSION CHAIR

Daniel Gracia Pérez, Thales

PUBLICITY CHAIRS

Gaspar Mora Porta, Intel USA

Diego R. Llanos, University of Valladolid

Dong Dezun, NUDT

FINANCE CHAIR

Vicky Wandels, Ghent University

WEB AND REGISTRATIONS CHAIR

Eneko Illarramendi, Ghent University

LOCAL ORGANISING COMMITTEE

Andrea Bartolini, University of Bologna

COMMUNICATION CHAIR

Madeleine Gray, BSC

RECRUITMENT CHAIR

Xavier Salazar, BSC