超越HLS的建筑:图表分析和其他 (Building Beyond HLS: Graph Analysis and Others)

from arxiv, 3 pages, 1 table. Accepted at LATTE '21, an ASPLOS workshop. Slightly differs from accepted version: includes some corrections and phrasing changes

High-Level Synthesis has introduced reconfigurable logic to a new world -- that of software development. The newest wave of HLS tools has been successful, and the future looks bright. But is HLS the end-all-be-all to FPGA acceleration? Is it enough to allow non-experts to program FPGAs successfully, even when dealing with troublesome data structures and complex control flows -- such as those often encountered in graph algorithms? We take a look at the panorama of adoption of HLS by the software community, focusing on graph analysis in particular in order to generalise to \textit{FPGA-unfriendly} problems. We argue for the existence of shortcomings in current HLS development flows which hinder adoption, and present our perspective on the path forward, including how these issues may be remedied via higher-level tooling.

翻译：高级合成引入了对一个新世界的可重新构建的逻辑 -- -- 软件开发的逻辑。最新的HLS工具浪潮是成功的,而未来看起来是光明的。但是,HLS是否最终是FPGA加速的终极-无一例外?它是否足以让非专家成功编程FPGAs,甚至当处理麻烦的数据结构和复杂的控制流时 -- -- 如在图表算法中经常遇到的那些数据结构和复杂的控制流时?我们审视了软件界采用HLS的全景,特别侧重于图表分析,以便概括化目前HLS发展流中阻碍采纳的缺陷,并展示了我们对前进道路的看法,包括如何通过更高层次的工具解决这些问题。